coreboot-kgpe-d16/src/soc/intel
York Yang fc1c1b572f intel/fsp_baytrail: add Gold3 FSP support
Baytrail Gold3 FSP adds a couple of parameters in UPD_DATA_REGION
making platform more configurable via devicetree.cb
Update the UPD_DATA_REGION structure and pass settings to FSP

Add Baytrail Gold2 and earlier FSP backward compatible, as Gold3
FSP changes UPD_DATA_REGION struct

Change-Id: Ia2d2d0595328ac771762a84da40697a3b7e900c6
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/7334
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
2014-11-21 23:05:19 +01:00
..
baytrail baytrail: fix range check 2014-11-18 08:25:43 +01:00
broadwell broadwell: move to per-device ACPI. 2014-11-19 21:08:13 +01:00
common baytrail: Move HDA verb table to Intel SOC common directory 2014-10-22 03:35:13 +02:00
fsp_baytrail intel/fsp_baytrail: add Gold3 FSP support 2014-11-21 23:05:19 +01:00
Kconfig baytrail: Move MRC cache code to a common directory 2014-10-22 03:33:20 +02:00
Makefile.inc fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip 2014-05-29 23:10:36 +02:00