Aaron Durbin fc7b953366 drivers/spi/spi_flash: remove spi flash names ... The names of each spi flash cause quite a bit of bloat in the text size of each stage/program. Remove the name entirely from spi flash in order to reduce overhead. In order to pack space as closely as possible the previous 32-bit id and mask were split into 2 16-bit ids and masks. On Chrome OS build of Aleena there's a savings of >2.21KiB in each of verstage, romstage, and ramstage. Change-Id: Ie98f7e1c7d116c5d7b4bf78605f62fee89dee0a5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>		2020-01-28 14:44:37 +00:00
..
acpi	soc/intel/{skylake,common}/acpi/dptf/thermal.asl: Prevent iasl remarks	2020-01-18 10:52:12 +00:00
basecode
block	drivers/spi/spi_flash: remove spi flash names	2020-01-28 14:44:37 +00:00
pch	soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC specific Kconfig	2020-01-16 16:28:09 +00:00
acpi.h
acpi_wake_source.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
hda_verb.c	soc/intel/common: Make alignment proper for comments	2019-11-15 11:01:33 +00:00
hda_verb.h
Kconfig	cpu/x86/smm: Promote smm_memory_map()	2019-08-15 05:46:59 +00:00
Makefile.inc
mma.c	printf: Automatically prefix %p with 0x	2019-12-11 11:38:59 +00:00
mma.h
nhlt.c
reset.c
reset.h
smbios.c	{nb,soc}: Replace min/max() with MIN/MAX()	2019-12-20 17:46:37 +00:00
smbios.h	soc/intel: Provide SPD manufacturer ID and module type to SMBIOS	2019-06-21 09:17:16 +00:00
tpm_tis.c
vbt.c
vbt.h