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coreboot-kgpe-d16/util/superiotool/smsc.c

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util/: Replace GPLv2 boiler plate with SPDX header Used commands: perl -i -p0e 's|\/\*[\s*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-only */|' $(cat filelist) perl -i -p0e 's|This[\s*]*program[\s*]*is[\s*]*free[\s*]*software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*either[\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License,[\s*]*or[\s*]*.at[\s*]*your[\s*]*option.*[\s*]*any[\s*]*later[\s*]*version.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-or-later */|' $(cat filelist) perl -i -p0e 's|\/\*[\s*]*.*This[\s*#]*program[\s*#]*is[\s*#]*free[\s*#]*software[;:,][\s*#]*you[\s*#]*can[\s*#]*redistribute[\s*#]*it[\s*#]*and/or[\s*#]*modify[\s*#]*it[\s*#]*under[\s*#]*the[\s*#]*terms[\s*#]*of[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*as[\s*#]*published[\s*#]*by[\s*#]*the[\s*#]*Free[\s*#]*Software[\s*#]*Foundation[;:,][\s*#]*either[\s*#]*version[\s*#]*3[\s*#]*of[\s*#]*the[\s*#]*License[;:,][\s*#]*or[\s*#]*.at[\s*#]*your[\s*#]*option.*[\s*#]*any[\s*#]*later[\s*#]*version.[\s*#]*This[\s*#]*program[\s*#]*is[\s*#]*distributed[\s*#]*in[\s*#]*the[\s*#]*hope[\s*#]*that[\s*#]*it[\s*#]*will[\s*#]*be[\s*#]*useful[;:,][\s*#]*but[\s*#]*WITHOUT[\s*#]*ANY[\s*#]*WARRANTY[;:,][\s*#]*without[\s*#]*even[\s*#]*the[\s*#]*implied[\s*#]*warranty[\s*#]*of[\s*#]*MERCHANTABILITY[\s*#]*or[\s*#]*FITNESS[\s*#]*FOR[\s*#]*A[\s*#]*PARTICULAR[\s*#]*PURPOSE.[\s*#]*See[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*for[\s*#]*more[\s*#]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-3.0-or-later */|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w]*.*is free software[:;][\#\s]*you[\#\s]*can[\#\s]*redistribute[\#\s]*it[\#\s]*and\/or[\#\s]*modify[\#\s]*it[\s\#]*under[\s \#]*the[\s\#]*terms[\s\#]*of[\s\#]*the[\s\#]*GNU[\s\#]*General[\s\#]*Public[\s\#]*License[\s\#]*as[\s\#]*published[\s\#]*by[\s\#]*the[\s\#]*Free[\s\#]*Software[\s\#]*Foundation[;,][\s\#]*version[\s\#]*2[\s\#]*of[\s\#]*the[\s\#]*License.*[\s\#]*This[\s\#]*program[\s\#]*is[\s\#]*distributed[\s\#]*in[\s\#]*the[\s\#]*hope[\s\#]*that[\s\#]*it[\s\#]*will[\#\s]*be[\#\s]*useful,[\#\s]*but[\#\s]*WITHOUT[\#\s]*ANY[\#\s]*WARRANTY;[\#\s]*without[\#\s]*even[\#\s]*the[\#\s]*implied[\#\s]*warranty[\#\s]*of[\#\s]*MERCHANTABILITY[\#\s]*or[\#\s]*FITNESS[\#\s]*FOR[\#\s]*A[\#\s]*PARTICULAR[\#\s]*PURPOSE.[\#\s]*See[\#\s]*the[\#\s]*GNU[\#\s]*General[\#\s]*Public[\#\s]*License[\#\s]*for[\#\s]*more[\#\s]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) Change-Id: I1008a63b804f355a916221ac994701d7584f60ff Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-08 20:48:04 +02:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
#include "superiotool.h"
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
#define DEVICE_ID_REG_OLD 0x0d
#define DEVICE_REV_REG_OLD 0x0e
util/superiotool: Remove whitespace before tab Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-29 22:23:48 +02:00
#define DEVICE_ID_REG 0x20
#define DEVICE_REV_REG 0x21
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
Use the preferred order of 'static const' instead of 'const static'. This is the common style in both Linux as well as in LinuxBIOS. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-31 23:22:11 +01:00
static const struct superio_registers reg_table[] = {
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
/* The following Super I/Os use the 0x20/0x21 ID registers. */
Add support for the SMSC FDC37C932 Super I/O. This chip is found e.g. in the Nokia IP330 (firewall hardware). Signed-off-by: Marc Bertens <mbertens@xs4all.nl> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-13 03:22:20 +02:00
{0x02, "FDC37C932", {
{NOLDN, NULL,
{0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x2d,0x2e,
0x2f,EOT},
{0x00,0x03,0x02,0x01,0x00,0x00,0x04,NANA,NANA,
0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x1, "IDE 1",
{0x30,0x60,0x61,0x62,0x63,0x70,EOT},
{0x00,0x01,0xf0,0x03,0xf6,0x0e,EOT}},
{0x2, "IDE 2",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
{0x00,0x00,0x00,0x00,0x00,NANA,MISC,NANA,NANA,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,EOT},
{0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
{0x30,0x60,0x61,0x62,0x63,0xe0,0xe1,0xe2,0xe3,0xe4,
0xe5,0xe6,0xe7,0xe8,0xe9,0xea,0xeb,0xec,0xed,0xf0,
0xf1,0xf2,0xf3,0xf4,EOT},
{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,
0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,
0x00,0x00,0x00,MISC,EOT}},
Since some people disapprove of white space cleanups mixed in regular commits while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-27 08:56:47 +02:00
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x03, "FDC37C93xFR", {
/* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */
{EOT}}},
superiotool: Add SMSC KBC1126 Device ID is read from HP Elitebook 2760p. Based on: - superio/smsc/kbc1100 (LDNs, keyboard, EC) - DSDT from OEM firmware (COM1 and mailbox) - Datasheet "KBC1122 Priliminary DS Rev. 0.8" Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/18480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-02-24 08:35:55 +01:00
{0x07, "KBC1126", {
/*
* Found in HP Elitebook 2760p and 8470p.
* The registers are taken from the datasheet of KBC1122 which is similar.
*/
{NOLDN, NULL,
{0x02,0x03,0x07,0x17,0x20,0x21,0x22,0x23,0x24,0x25,
0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,
EOT},
{0x00,RSVD,0x00,RSVD,0x07,0x00,0x00,0x00,0x04,0x04,
MISC,MISC,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,
EOT}},
{0x1, "Power management (PM1)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2 / IRCC",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
0xf2,0xf7,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,
0x03,0x00,0x00,EOT}},
{0x7, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x60,0x00,0x00,0x00,EOT}},
{0x8, "Embedded controller (EC)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x9, "Mailbox",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xa, "LPC/8051 addressable GPIO (LGPIO)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xb, "Share flash interface (SFI)",
{0x30,0xff,EOT},
{0x01,0x0c,EOT}},
{0xd, "EC channel 1",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0xe, "EC channel 2",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x10, "Infrared CIRCC2.0",
{0x30,0x60,0x61,0x70,0x74,0xe0,0xf0,0xf1,0xf2,0xf7,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x02,0x03,0x00,0x00,EOT}},
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x0a, "FDC37N971", {
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,0x0a,0x00,0x00,0x00,0x04,0x04,NANA,NANA,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf3,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,RSVD,0x00,
0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0x1, "Power management (PM1)",
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
0xf2,0xf7,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,
0x03,0x00,0x00,EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x70,0x00,0x74,0x00,0x00,NANA,EOT}},
{0x7, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0x8, "Embedded controller (EC)",
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x9, "Mailbox",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{EOT}}},
{0x0b, "FDC37N972", {
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,0x0b,0x00,0x00,0x00,0x04,0x04,NANA,NANA,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf3,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,RSVD,0x00,
0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0x1, "Power management (PM1)",
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
0xf2,0xf7,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,
0x03,0x00,0x00,EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x70,0x00,0x74,0x00,0x00,NANA,EOT}},
{0x7, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0x8, "Embedded controller (EC)",
add support for 2 new SMSC superio chips. Information is a bit ambiguous and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:07:35 +02:00
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x9, "Mailbox",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x0e, "LPC47N252", { /* From sensors-detect */
Add dump support for SMSC LPC47N252. Signed-off-by: François-Regis Vuillemin <coreboot@miradou.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-27 04:23:26 +02:00
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x0e,NANA,0x00,0x00,0x04,0x04,NANA,NANA,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf3,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,RSVD,0x00,
0x00,EOT}},
{0x1, "Power management (PM1)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2 / IRCC",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
0xf2,0xf7,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,
0x03,0x00,0x00,EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x70,0x00,0x74,0x00,0x00,NANA,EOT}},
{0x7, "Keyboard",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x8, "Embedded controller (EC)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x9, "Mailbox Interface",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xa, "LPC/8051 addressable GPIO (LGPIO)",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x14, "LPC47M172", {
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x30, "FDC37C93xAPM", {
{EOT}}},
Fixup a register dump attached to the wrong Super I/O. Seems something went wrong in one of the recent commits. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:59:46 +02:00
{0x40, "FDC37C67x", { /* E.g. FDC37C672. Chiprev: 0x01 */
Dump support for SMSC FDC37C67x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-25 22:43:29 +01:00
{NOLDN, NULL,
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c,
0x2d,0x2e,0x2f,EOT},
{0x03,0x40,NANA,0x00,0x00,0x04,MISC,MISC,NANA,NANA,
NANA,NANA,NANA,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,0xf2,
EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,0x03,
EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
{0x30,0xb4,0xb5,0xb6,0xb7,0xc0,0xc1,0xc2,0xc3,0xc4,
0xf1,0xf2,0xf3,0xf4,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,
EOT},
{0x00,NANA,NANA,NANA,NANA,0x06,0x03,NANA,NANA,NANA,
0x00,0x00,0x00,MISC,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,
EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x42, "FDC37B80x/FDC37M707", {
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
Add detection and dump support for the SMSC FDC37N958FR (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14 01:30:36 +01:00
{0x09, "FDC37N958FR", { /* Found in e.g. Dell Latitude CPi A366XT. */
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b,
0x2c,0x2d,0x2e,0x2f,EOT},
{0x03,0x44,0x00,0x00,0x00,0x04,MISC,MISC,0x00,NANA,
NANA,NANA,NANA,NANA,EOT}},
Add detection and dump support for the SMSC FDC37N958FR (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-14 01:30:36 +01:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,0xf2,
EOT},
{NANA,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,0x03,
EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x62,0x63,0x70,0xf0,EOT},
{0x00,0x00,0x70,0x00,0x00,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
{0x30,0xb0,0xb1,0xb2,0xb3,0xb8,0xc0,0xc1,0xc2,0xc3,
0xc4,0xc5,0xc6,0xc8,0xca,0xcb,0xcc,0xd0,0xd1,0xd2,
0xd3,0xd4,0xd5,0xd6,0xd7,0xe0,0xe1,0xe2,0xe3,0xe4,
0xe5,0xe6,0xe7,0xef,0xf0,0xf1,0xf2,0xf3,0xf4,0xf6,
0xf9,0xfa,EOT},
{0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x01,NANA,NANA,
NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,NANA,
NANA,NANA,EOT}},
{0xa, "ACPI",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,NANA,NANA,EOT}},
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x43, "FDC37B77x", {
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x44, "FDC37B78x", {
Dump support for the SMSC FDC37B78x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 17:04:17 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b,
0x2c,0x2d,0x2e,0x2f,EOT},
{0x03,0x44,0x00,0x00,0x00,0x04,MISC,MISC,0x00,NANA,
NANA,NANA,NANA,NANA,EOT}},
Dump support for the SMSC FDC37B78x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 17:04:17 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,0xf2,
EOT},
{NANA,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,0x03,
EOT}},
{0x6, "Real-time clock (RTC)",
{0x30,0x62,0x63,0x70,0xf0,EOT},
{0x00,0x00,0x70,0x00,0x00,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
{0x30,0xb0,0xb1,0xb2,0xb3,0xb8,0xc0,0xc1,0xc2,0xc3,
0xc4,0xc5,0xc6,0xc8,0xca,0xcb,0xcc,0xd0,0xd1,0xd2,
0xd3,0xd4,0xd5,0xd6,0xd7,0xe0,0xe1,0xe2,0xe3,0xe4,
0xe5,0xe6,0xe7,0xef,0xf0,0xf1,0xf2,0xf3,0xf4,0xf6,
0xf9,0xfa,EOT},
{0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x01,NANA,NANA,
NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,NANA,
NANA,NANA,EOT}},
{0xa, "ACPI",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,NANA,NANA,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x47, "FDC37M60x", { /* TODO: Not yet in sensors-detect */
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x4c, "FDC37B72x", {
Dump support for the SMSC FDC37B72x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 17:12:12 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b,
0x2c,0x2d,0x2e,0x2f,EOT},
{0x03,0x4c,0x00,0x00,0x00,0x04,MISC,MISC,0x00,NANA,
NANA,NANA,NANA,NANA,EOT}},
Dump support for the SMSC FDC37B72x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 17:12:12 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{NANA,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
{0x30,0xb0,0xb1,0xb2,0xb3,0xb8,0xc0,0xc1,0xc2,0xc3,
0xc4,0xc5,0xc6,0xc8,0xca,0xcb,0xcc,0xd0,0xd1,0xd2,
0xd3,0xd4,0xd5,0xd6,0xd7,0xe0,0xe1,0xe2,0xe3,0xe4,
0xe5,0xe6,0xe7,0xef,0xf0,0xf1,0xf2,0xf3,0xf4,0xf6,
0xf9,0xfa,EOT},
{0x00,NANA,NANA,NANA,NANA,NANA,0x00,0x01,NANA,NANA,
NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,NANA,0x00,0x00,0x00,MISC,NANA,
NANA,NANA,EOT}},
{0xa, "ACPI",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,NANA,NANA,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
add mec1308 support to superiotool This patch also disables FDC37M81x since it has a conflicting device ID and is not supported very well anyway. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Stefan Reinauer <reinauer@google.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-17 01:52:02 +01:00
#if 0
/* FIXME: FDC37M81x and MEC1308 have conflicting device IDs */
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x4d, "FDC37M81x", {
Dump support for the SMSC FDC37M81x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 16:33:13 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c,
0x2d,0x2e,0x2f,EOT},
{0x03,0x4d,NANA,0x00,0x00,0x04,MISC,MISC,NANA,NANA,
NANA,NANA,NANA,EOT}},
Dump support for the SMSC FDC37M81x. Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 16:33:13 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,RSVD,RSVD,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "Aux I/O",
/* Only 0xf6 existing (and reserved) or 0xf6..0xfb? */
{0x30,0xb4,0xb5,0xb6,0xb7,0xc0,0xc1,0xc2,0xc3,0xc4,
0xc5,0xc6,0xc7,0xc8,0xf1,0xf2,0xf3,0xf4,0xf6,0xf7,
0xf8,0xf9,0xfa,0xfb,EOT},
{0x00,NANA,NANA,NANA,NANA,0x02,0x01,NANA,NANA,NANA,
NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD,
RSVD,RSVD,RSVD,RSVD,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
add mec1308 support to superiotool This patch also disables FDC37M81x since it has a conflicting device ID and is not supported very well anyway. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Stefan Reinauer <reinauer@google.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-17 01:52:02 +01:00
#endif
{0x4d, "MEC1308", {
{NOLDN, NULL,
{0x02,0x03,0x07,0x17,0x20,0x21,0x22,0x23,0x24,0x25,
superiotool: Cosmetics and coding style fixes. Change-Id: Iacda2a9e37635d5cffc5004caf588ef3e5e09b5e Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Reviewed-on: http://review.coreboot.org/18 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2011-06-09 20:56:29 +02:00
0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,
add mec1308 support to superiotool This patch also disables FDC37M81x since it has a conflicting device ID and is not supported very well anyway. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Stefan Reinauer <reinauer@google.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-17 01:52:02 +01:00
EOT},
{0x00,RSVD,0x00,RSVD,0x4d,0x00,0x00,0x00,0x04,0x04,
MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,
EOT}},
{0x1, "PM1",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x7, "KBD",
superiotool: Cosmetics and coding style fixes. Change-Id: Iacda2a9e37635d5cffc5004caf588ef3e5e09b5e Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Reviewed-on: http://review.coreboot.org/18 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2011-06-09 20:56:29 +02:00
{0x30,0x70,0x72,0xf0,EOT},
add mec1308 support to superiotool This patch also disables FDC37M81x since it has a conflicting device ID and is not supported very well anyway. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Stefan Reinauer <reinauer@google.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-17 01:52:02 +01:00
{0x00,0x00,0x00,0x00,EOT}},
{0x8, "EC/ACPI",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x62,EOT}},
{0x9, "Mailbox",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0x10, "CIRV",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf3,0xf4,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x51, "LPC47B27x", {
Dump support for the SMSC LPC47B27x (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-22 04:36:18 +01:00
{NOLDN, NULL,
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,
0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x51,NANA,0x00,0x00,0x04,MISC,MISC,RSVD,
NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,0xf2,
EOT},
{NANA,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,0x03,
EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x9, "Game port",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xa, "Power-management events (PME)",
{0x30,0x60,0x61,0xf0,0xf1,EOT},
{0x00,0x00,0x00,NANA,NANA,EOT}},
{0xb, "MIDI port (MPU-401)",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x03,0x30,0x05,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x52, "LPC47B37x", {
Fixup a register dump attached to the wrong Super I/O. Seems something went wrong in one of the recent commits. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:59:46 +02:00
{EOT}}},
{0x54, "LPC47U33x", {
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{NOLDN, NULL,
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2a,0x2b,
0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x54,NANA,0x00,0x00,0x04,MISC,MISC,NANA,NANA,
NANA,NANA,NANA,NANA,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "MIDI port (MPU-401)",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x03,0x30,0x05,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x9, "Game port",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0xf0,0xf1,EOT},
{0x00,0x00,0x00,NANA,NANA,EOT}},
{0xb, "SMBus",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x00,0x00,0x00,EOT}},
Fixup a register dump attached to the wrong Super I/O. Seems something went wrong in one of the recent commits. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:59:46 +02:00
{EOT}}},
{0x56, "LPC47B34x", {
{EOT}}},
{0x57, "LPC47S42x", {
{EOT}}},
{0x59, "LPC47M10x/112/13x", {
Add dump support for the SMSC LPC47M10x (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 17:11:38 +02:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a,
0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x59,NANA,0x00,0x00,0x44,MISC,MISC,RSVD,NANA,
NANA,NANA,NANA,NANA,NANA,EOT}},
Add dump support for the SMSC LPC47M10x (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 17:11:38 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
0xf2,EOT},
{NANA,0x00,0x00,RSVD,RSVD,0x00,RSVD,0x00,0x02,
0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x9, "Game port",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0xa, "Power management events (PME)",
Add dump support for the SMSC LPC47M10x (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 17:11:38 +02:00
{0x30,0x60,0x61,0xf0,0xf1,EOT},
{0x00,0x00,0x00,NANA,RSVD,EOT}},
{0xb, "MPU-401",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x03,0x30,0x05,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x5d, "LPC47B357", { /* From sensors-detect (no datasheet) */
{EOT}}},
{0x5f, "LPC47M14x", {
{EOT}}},
{0x60, "LPC47M15x/192/997", {
Add dump support for SMSC LPC47M192. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-14 21:00:58 +01:00
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a,
0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x60,NANA,0x00,0x00,0x44,MISC,MISC,RSVD,NANA,
NANA,NANA,NANA,NANA,NANA,EOT}},
Add dump support for SMSC LPC47M192. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-14 21:00:58 +01:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2 / IR",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{NANA,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x9, "Game port",
{0x30,0x60,0x61,EOT},
{0x00,0x00,0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0xa, "Power management events (PME)",
Add dump support for SMSC LPC47M192. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-14 21:00:58 +01:00
{0x30,0x60,0x61,0xf0,EOT},
{0x00,0x00,0x00,NANA,EOT}},
{0xb, "MPU-401",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x03,0x30,0x05,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{EOT}}},
{0x62, "LPC47S45x", {
{EOT}}},
Add some more Super I/O IDs/names (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01 22:16:58 +02:00
{0x67, "EMC2700LPC", { /* From sensors-detect */
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x6b, "LPC47M292", { /* From sensors-detect */
{EOT}}},
{0x6e, "LPC47B387", { /* TODO: Not yet in sensors-detect */
Add detection support for the LPC47B387 (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 18:28:56 +02:00
/* Found in the HP Compaq Business Desktop d530 Series */
Various small fixes (trivial). - Add missing contributors to the README. - Drop obsolete -D option from manpage. - Only list contributors who added non-trivial amounts of code as copyright holders (and do not list those who merely provided register dump support for Super I/Os). Those contributors are still listed in the README, of course. See discussion in the thread starting at http://www.linuxbios.org/pipermail/linuxbios/2007-October/025516.html - Make a function static. - Fix incorrect URL in code comment. Drop obsolete comments. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29 03:43:50 +01:00
/* http://article.gmane.org/gmane.linux.bios/27192 */
Add detection support for the LPC47B387 (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 18:28:56 +02:00
/* We cannot find a public datasheet for this Super I/O. */
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x6f, "LPC47B397", {
{EOT}}},
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
{0x74, "LPC47M182", { /* Only for LD_NUM = 0 */
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
{NOLDN, NULL,
Don't dump 0x07 registers, they're useless as they change every time some software wants to do an LDN access (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:53:07 +02:00
{0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
Don't dump 0x07 registers, they're useless as they change every time some software wants to do an LDN access (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:53:07 +02:00
{0x00,RSVD,0x74,RSVD,0x00,RSVD,0x44,MISC,0x00,
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf8,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x24,EOT}},
{0x1, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf8,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,0x08,EOT}},
{0x2, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x3, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
This adds register definitions for all logical devices on the SMSC LPC47U33x, allowing 'superiotool -d' to work. Also, some consistency string fixes. Signed-off-by: Michael Gold <mgold@ncf.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-26 17:25:04 +02:00
{0x4, "Power control",
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
{0x5, "Mouse",
{0x30,0x70,EOT},
{0x00,0x00,EOT}},
{0x6, "Keyboard",
{0x30,0x70,0xf0,EOT},
{0x00,0x00,0x00,EOT}},
{0x7, "GPIO",
{0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x76, "LPC47M584", { /* From sensors-detect (no datasheet) */
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x77, "A8000", { /* ASUS A8000, a rebranded DME1737(?) */
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a,
0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x77,NANA,0x00,RSVD,0x44,MISC,MISC,RSVD,NANA,
NANA,NANA,NANA,NANA,NANA,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}},
{EOT}}},
{0x78, "DME1737", {
{NOLDN, NULL,
Drop global register 0x07 for all Super I/Os (trivial). This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14 18:34:38 +02:00
{0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a,
0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{RSVD,0x77,NANA,0x00,RSVD,0x44,MISC,MISC,RSVD,NANA,
NANA,NANA,NANA,NANA,NANA,EOT}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}},
{EOT}}},
util/superiotool/smsc.c: Add SCH5504 register dump There is no datasheet available for this SuperIO, but dumping all possible registers on a Dell Optiplex GX520 resulted in data that was similar to other supported chips. Data also matches what is set in the BIOS, e.g. the parallel and serial ports' addresses. Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-07 18:57:21 +02:00
{0x79, "SCH5504", { /* No datasheet, reverse-engineered */
{NOLDN, NULL, /* FIXME: Is this correct? */
{0x02,0x03,0x21,0x22,0x23,0x24,0x26,0x27,
0x28,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,RSVD,MISC,0x00,0x00,0x04,MISC,0x00,
RSVD,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers", /* FIXME: Is this correct? */
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x00,RSVD,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
Fix my last commit. I looked at the wrong dead laptop. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-07 02:21:02 +02:00
{0x7a, "LPC47N217", { /* Found in Toshiba Satellite A80-117. */
superiotool: Add registers of LPC47N217 Change-Id: I460663593dc32f5b52c19c3f19fbc35b8252ed4d Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/19606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-06 11:46:25 +02:00
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,
0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,EOT},
{0x28,0x9c,0x08,0x70,0x00,0x00,0xff,0x00,RSVD,0x00,
0x00,0x00,0x02,0x7a,NANA,0x00,0x00,0x00,MISC,0x00,
NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,
RSVD,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x80,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,RSVD,0x00,0x00,0x80,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x7c, "SCH3112", {
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{NOLDN, NULL,
{0x02,0x03,0x19,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,RSVD,RSVD,MISC,0x00,RSVD,0x44,RSVD,MISC,MISC,
RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x7d, "SCH3114", {
Add SMSC SCH3114 superio register descriptions to superiotool. This has been tested on a Aaeon PFM-540I RevB PC104 SBC. Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec Signed-off-by: Mark Norman <mpnorman@gmail.com> Reviewed-on: http://review.coreboot.org/43 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-18 02:54:36 +02:00
{NOLDN, NULL,
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{0x02,0x03,0x19,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
Add SMSC SCH3114 superio register descriptions to superiotool. This has been tested on a Aaeon PFM-540I RevB PC104 SBC. Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec Signed-off-by: Mark Norman <mpnorman@gmail.com> Reviewed-on: http://review.coreboot.org/43 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-18 02:54:36 +02:00
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{0x00,RSVD,RSVD,MISC,0x00,RSVD,0x44,RSVD,MISC,MISC,
Add SMSC SCH3114 superio register descriptions to superiotool. This has been tested on a Aaeon PFM-540I RevB PC104 SBC. Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec Signed-off-by: Mark Norman <mpnorman@gmail.com> Reviewed-on: http://review.coreboot.org/43 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-18 02:54:36 +02:00
RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,EOT}},
Add SMSC SCH3114 superio register descriptions to superiotool. This has been tested on a Aaeon PFM-540I RevB PC104 SBC. Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec Signed-off-by: Mark Norman <mpnorman@gmail.com> Reviewed-on: http://review.coreboot.org/43 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-18 02:54:36 +02:00
{0xb, "COM3",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0xc, "COM4",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x7f, "SCH3116", {
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{NOLDN, NULL,
{0x02,0x03,0x19,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,RSVD,RSVD,MISC,0x00,RSVD,0x44,RSVD,MISC,MISC,
RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,EOT}},
{0xb, "COM3",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0xc, "COM4",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0xd, "COM5",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0xe, "COM6",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
{0x81, "SCH5307", {
{EOT}}},
Add some more Super I/O IDs/names (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01 22:16:58 +02:00
{0x83, "SCH5514D", { /* From sensors-detect */
{EOT}}},
util/superiotool/smsc.c: Add some register dumps The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-28 21:03:47 +02:00
{0x86, "SCH5127", { /* From sensors-detect, dump from datasheet */
{NOLDN, NULL,
{0x02,0x03,0x21,0x22,0x23,0x24,0x26,0x27,
0x28,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x00,RSVD,MISC,0x00,0x00,0x44,MISC,0x00,
RSVD,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
{0x4, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{0x5, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
{0x7, "Keyboard",
{0x30,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0xa, "Runtime registers",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0x00,RSVD,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
Detect SMSC SCH5027 (trivial). This chip seems to be very similar to the SMSC DME1737, for coreboot purposes it might even work without any code changes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23 11:27:18 +02:00
{0x89, "SCH5027", { /* From sensors-detect (no public datasheet) */
{EOT}}},
Add some more Super I/O IDs/names (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01 22:16:58 +02:00
{0x8c, "SCH5317", { /* From sensors-detect */
/* The SCH5317 can have either 0x85 or 0x8c as device ID. */
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x90, "SCH4307", { /* From sensors-detect */
{EOT}}},
/* The following Super I/Os use the 0x0d/0x0e ID registers. */
{0x03, "FDC37C669", {
/* Init: 0x55, 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */
/* Chiprev: 0x02. */
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
/* FIXME: There's another 0x03 but found on port 0x20/0x21! */
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
{0x04, "FDC37C669FR", { /* TODO: Not yet in sensors-detect. */
/* Init: 0x55, 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x13, "LPC47N237", {
/* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x28, "FDC37N769", {
/* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x28,0x9c,0x88,0x70,0x00,0x00,0xff,0x00,0x00,0x00,
0x00,0x00,0x02,0x28,NANA,0x00,0x00,0x80,RSVD,RSVD,
NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,
0x80,0x00,0x3c,RSVD,RSVD,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,RSVD,0x00,0x00,0x03,0x00,0x00,EOT}},
{EOT}}},
Detection support for more Super I/Os. Small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-17 18:13:52 +01:00
{0x29, "FDC37N3869/FDC37N869", {
/* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x5a, "LPC47N227", {
/* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */
Dump support for the SMSC LPC47N227. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13 19:06:21 +02:00
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,
0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,EOT},
{0x28,0x9c,0x08,0x70,0x00,0x00,0xff,0x00,RSVD,0x00,
0x00,0x00,0x02,0x5a,NANA,0x00,0x00,0x80,MISC,0x00,
NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD,
RSVD,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x80,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,EOT}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{EOT}}},
superiotool: add support for SMSC SIO10N268 (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:42:21 +02:00
{0x5b, "SIO10N268", {
/* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */
{NOLDN, NULL,
fix typo in superiotool (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-15 11:46:55 +02:00
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
superiotool: add support for SMSC SIO10N268 (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 16:42:21 +02:00
0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,
0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,
0x3c,0x3d,0x3e,0x3f,0x40,0x41,0x42,0x43,0x44,0x45,
0x46,0x47,0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,
0x50,0x51,0x52,0x53,0x54,EOT},
{0x20,0x98,0x00,0x70,0x00,0x00,0xff,0x00,0x00,0x00,
0x00,0x00,0x02,0x5b,NANA,0x00,0x00,0x00,MISC,0x00,
NANA,NANA,NANA,0x03,0x00,NANA,NANA,0x00,0x00,0x00,
NANA,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0xff,0x00,
0x00,0x80,0x00,0x00,0x0f,0x03,0x00,0x00,0x00,NANA,
NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,0x50,
NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x01,
0x00,0x01,0x00,0x8c,MISC,EOT}},
{EOT}}},
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
{0x65, "FDC37C665GT/IR", {
/* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */
/* Chiprev: 0x02 = FDC37C665GT, 0x82 = FDC37C665IR */
{EOT}}},
{0x66, "FDC37C666GT", {
/* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. Chiprev: 0x02. */
{EOT}}},
superiotool: add basic support for SCH5545 Based on the SCH5627 datasheet which is similiar SCH5545 id 0xc4, SCH5627 id 0xc6. Change-Id: I81f3f68690d2000a4fa8a1e703c01f54ebbce953 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/c/coreboot/+/20237 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-06-16 14:45:08 +02:00
{0xc4, "SCH5545", {
/* based on SCH5627 datasheet */
/* Init: 0x55. Exit: 0xaa. */
{0x7, "COM1",
{0x30, 0xf0, EOT},
{0x00, 0x00, EOT}},
{0x0c, "LPC Interface",
{0x30,
/* IRQ config */
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
/* DMA Channel 0 - 7 */
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
/* BAR configuration port */
0x60, 0x61, 0x62, 0x63,
/* BAR EMI */
0x64, 0x65, 0x66, 0x67,
/* BAR UART1 */
0x68, 0x69, 0x6a, 0x6b,
/* BAR UART2 */
0x6c, 0x6d, 0x6e, 0x6f,
/* BAR Runtime Registers */
0x70, 0x71, 0x72, 0x73,
/* BAR 8042 */
0x78, 0x79, 0x7a, 0x7b,
/* BAR Floppy Disk Controller */
0x7c, 0x7d, 0x7e, 0x7f,
/* BAR Parallel Port */
0x80, 0x81, 0x82, 0x83,
EOT},
{EOT}},
{EOT}}},
util/superiotool: Add SMSC MEC5035 Also comment out the SMSC FDC37M602 which has a conflicting ID and has never had the LDN/register layout anyway. Tested on a Dell Latitude E6400 Change-Id: I5b1900e6ef599c422a1d6eca7a2ac4691d56d874 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69481 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-08 01:41:25 +01:00
/* FIXME: Conflicting ID with MEC5035
{0x46, "FDC37M602", { Found in Biostar M6TLD.
{EOT}}},
*/
{0x46, "MEC5035", {
{NOLDN, NULL,
{0x07, 0x20, 0x21, 0x24, EOT},
{0x00, 0x46, 0x00, 0x00, EOT}},
{0x1, "Keyboard Controller",
{0x30, EOT},
{0x00, EOT}},
{0x6, "UART",
{0x30, 0xF0, EOT},
{0x00, 0x00, EOT}},
{0xC, "LPC Interface",
{0x30,
/* IRQ Config */
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48,
0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
/* DMA Channel 0 - 7 */
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
/* BAR configuration Port */
0x60, 0x61, 0x62, 0x63,
/* BAR Mailbox Registers */
0x64, 0x65, 0x66, 0x67,
/* BAR 8042 Keyboard Interface */
0x68, 0x69, 0x6a, 0x6b,
/* BAR ACPI EC Interface 1 */
0x6c, 0x6d, 0x6e, 0x6f,
/* BAR ACPI EC Interface 2 */
0x70, 0x71, 0x72, 0x73,
/* BAR ACPI EC Interface 3 */
0x74, 0x75, 0x76, 0x77,
/* BAR ACPI PM1 Interface */
0x78, 0x79, 0x7a, 0x7b,
/* BAR UART */
0x7c, 0x7d, 0x7e, 0x7f,
/* BAR Legacy (Fast Keyboard) Interface */
0x80, 0x81, 0x82, 0x83,
/* BAR Embedded Flash Interface */
0x84, 0x85, 0x86, 0x87,
EOT},
{0x00,
/* IRQ Config */
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
/* DMA Channel 0 - 7 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* BAR configuration Port */
0x01, 0x0C, 0x2e, 0x00,
/* BAR Mailbox Registers */
0x01, 0x00, 0x00, 0x00,
/* BAR 8042 Keyboard Interface */
0x04, 0x01, 0x60, 0x00,
/* BAR ACPI EC Interface 1 */
0x04, 0x02, 0x62, 0x00,
/* BAR ACPI EC Interface 2 */
0x07, 0x03, 0x62, 0x00,
/* BAR ACPI EC Interface 3 */
0x07, 0x04, 0x62, 0x00,
/* BAR ACPI PM1 Interface */
0x07, 0x05, 0x00, 0x00,
/* BAR UART */
0x07, 0x06, 0x00, 0x00,
/* BAR Legacy (Fast Keyboard) Interface */
0x00, 0x07, 0x92, 0x00,
/* BAR Embedded Flash Interface */
0x04, 0x0e, 0x00, 0x00,
EOT}},
{EOT}}},
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
{EOT}
};
Further code simplifications and improvements. Add command line option handling code. The following options are defined at the moment: -d|--dump Dump Super I/O registers. -V|--verbose Verbose mode. -v|--version Show the superiotool version. -h|--help Show a short help text. Per default (no options) we just probe for a Super I/O and print its vendor, name, ID, version, and config port. Example: $ ./superiotool Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 $ ./superiotool -d Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 $ ./superiotool -s ./superiotool: invalid option -- s $ ./superiotool -h Usage: superiotool [-d] [-V] [-v] [-h] $ ./superiotool -v superiotool 0.1 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 03:55:35 +02:00
static void enter_conf_mode_smsc(uint16_t port)
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
{
Add detection support for lots more SMSC Super I/Os (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 03:11:11 +02:00
/* Some of the SMSC Super I/Os have an 0x55,0x55 init, some only
* require one 0x55. We do 0x55,0x55 for all of them at the moment,
* in the assumption that the extra 0x55 won't hurt the other
* Super I/Os. This is verified to be true on (at least) the FDC37N769.
*/
Allow superiotool to compile and work on FreeBSD. Tested on FreeBSD 7. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-28 23:13:38 +01:00
OUTB(0x55, port);
OUTB(0x55, port);
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
}
Further code simplifications and improvements. Add command line option handling code. The following options are defined at the moment: -d|--dump Dump Super I/O registers. -V|--verbose Verbose mode. -v|--version Show the superiotool version. -h|--help Show a short help text. Per default (no options) we just probe for a Super I/O and print its vendor, name, ID, version, and config port. Example: $ ./superiotool Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 $ ./superiotool -d Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 $ ./superiotool -s ./superiotool: invalid option -- s $ ./superiotool -h Usage: superiotool [-d] [-V] [-v] [-h] $ ./superiotool -v superiotool 0.1 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 03:55:35 +02:00
static void exit_conf_mode_smsc(uint16_t port)
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
{
Allow superiotool to compile and work on FreeBSD. Tested on FreeBSD 7. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-28 23:13:38 +01:00
OUTB(0xaa, port);
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
}
Fix up the SMSC detection code to probe _both_ old- and new-style Super I/Os from SMSC. Otherwise not all of them are detected (and there could theoretically be _two_ of them in a system, so we should probe for both types anyway). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:02:17 +02:00
static void probe_idregs_smsc_helper(uint16_t port, uint8_t idreg,
uint8_t revreg)
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
{
Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG. Various minor fixes and improvements (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 17:52:23 +02:00
uint8_t id, rev;
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
uint16_t runtime_base;
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
const char *info = (idreg == 0x20) ? "(idregs=0x20/0x21) "
: "(idregs=0x0d/0x0e) ";
probing_for("SMSC", info, port);
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
enter_conf_mode_smsc(port);
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
Fix up the SMSC detection code to probe _both_ old- and new-style Super I/Os from SMSC. Otherwise not all of them are detected (and there could theoretically be _two_ of them in a system, so we should probe for both types anyway). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:02:17 +02:00
id = regval(port, idreg);
rev = regval(port, revreg);
Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG. Various minor fixes and improvements (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 17:52:23 +02:00
if (superio_unknown(reg_table, id)) {
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
if (verbose)
printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", id, rev);
Fix up and generalize the ITE IT8708F code. It was only working out of pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 00:13:48 +02:00
exit_conf_mode_smsc(port);
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
return;
}
Avoid false detection of SMSC FDC37N972 when Infineon TPM is present Change-Id: Ibfb3af4c5d7675a5d4e27021cbb988c2ce00fd9f Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/420 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-07 17:43:05 +01:00
/* Infineon TPM causes false match of FDC37N972 */
if (idreg == DEVICE_ID_REG && revreg == DEVICE_REV_REG &&
id == 0x0b && rev == 0x00) {
/* Infineon sets config port in 0x27:0x26, but SMSC does not */
if (((regval(port, 0x27)<<8)|regval(port, 0x26)) == port) {
if (verbose)
printf(NOTFOUND "id=0x%02x, rev=0x%02x\n",
id, rev);
exit_conf_mode_smsc(port);
return;
}
}
* Convert the NSC code to the common code structure all other Super I/Os use. * Improve the --verbose output a bit more. Print the "Probing..." text for all Super I/Os and if a Super I/O is not known, show the data we were able to read from the chip (what data this is is very vendor/chip specific). * Thus the common no_superio_found() is dropped, it's not useful. The "read from 0x20" part was wrong for all Super I/Os other than the NSC ones anyway. * Winbond: For the 'olddevid' only use bits 3..0, mask away the others. * SMSC: Print which ID registers we try to read (in --verbose mode). * Minor cosmetic fixes. * Rename PC8374 to PC8374L (as per datasheet). * Rename probe_idregs_simple() to probe_idregs_nsc(). * Rename dump_readable_ns8374() to dump_readable_pc8374l(). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 17:23:38 +02:00
printf("Found %s %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
Add detection support for quite a number of SMSC Super I/Os. Also, add dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 03:40:09 +02:00
(id == 0x77 ? "ASUS" : "SMSC"), get_superio_name(reg_table, id),
id, rev, port);
Print a short message if no Super I/O chip could be detected (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 22:01:23 +02:00
chip_found = 1;
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
The Winbond Super I/O chips have another indirection of registers. The hwmon has generic registers and banked registers, mostly temperature handling, and SMI/GPIO stuff. Not all LDNs are switched via register offset 0x07, make it a parameter. Add support for dumping the hardware monitor of Winbond W83627THF/THG parts with the -e option. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-01 15:18:57 +01:00
dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id,
LDN_SEL);
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
if (extra_dump) {
switch (id) {
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
case 0x5a: /* LPC47N227 */
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
runtime_base = regval(port, 0x30) << 4;
if (runtime_base)
dump_io(runtime_base, 16);
else
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
printf("Runtime Register Block not mapped on this Super I/O.\n");
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
break;
superiotool: add basic support for SCH5545 Based on the SCH5627 datasheet which is similiar SCH5545 id 0xc4, SCH5627 id 0xc6. Change-Id: I81f3f68690d2000a4fa8a1e703c01f54ebbce953 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/c/coreboot/+/20237 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-06-16 14:45:08 +02:00
case 0xc4: /* SMSC5545 */
/* choose LPC interface */
regwrite(port, LDN_SEL, 0x0c);
runtime_base = regval(port, 0x73) << 8;
runtime_base |= regval(port, 0x72);
dump_io(runtime_base, 0x34);
break;
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
default:
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
printf("No extra registers known for this chip.\n");
Add support for the LPC47M182 to superiotool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11 15:48:20 +01:00
}
}
Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 02:48:42 +02:00
exit_conf_mode_smsc(port);
Superiotool: Add support for the SMSC FDC37N769. Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:24:34 +02:00
}
Fix up the SMSC detection code to probe _both_ old- and new-style Super I/Os from SMSC. Otherwise not all of them are detected (and there could theoretically be _two_ of them in a system, so we should probe for both types anyway). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 17:02:17 +02:00
void probe_idregs_smsc(uint16_t port)
{
probe_idregs_smsc_helper(port, DEVICE_ID_REG, DEVICE_REV_REG);
probe_idregs_smsc_helper(port, DEVICE_ID_REG_OLD, DEVICE_REV_REG_OLD);
}
Add new --list-supported switch for printing the list of Super I/Os supported by superiotool (closes #91). Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-15 23:30:55 +01:00
void print_smsc_chips(void)
{
print_vendor_chips("SMSC", reg_table);
- List SMSC LPC47N227 runtime register block as supported. - Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25 18:38:40 +01:00
printf("SMSC LPC47N227 runtime register block\n\n");
Add new --list-supported switch for printing the list of Super I/Os supported by superiotool (closes #91). Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-15 23:30:55 +01:00
}