2008-08-20 15:41:24 +02:00
|
|
|
/*
|
|
|
|
|
* inteltool - dump all registers on an Intel CPU + chipset based system.
|
|
|
|
|
*
|
2010-04-27 08:56:47 +02:00
|
|
|
* Copyright (C) 2008 by coresystems GmbH
|
|
|
|
|
*
|
2008-08-20 15:41:24 +02:00
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
|
* the Free Software Foundation; version 2 of the License.
|
|
|
|
|
*
|
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
|
*
|
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
|
* along with this program; if not, write to the Free Software
|
|
|
|
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#include <stdio.h>
|
|
|
|
|
#include "inteltool.h"
|
|
|
|
|
|
|
|
|
|
static const io_register_t ich0_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "GPO_TTL" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "RESERVED" },
|
|
|
|
|
{ 0x34, 4, "RESERVED" },
|
|
|
|
|
{ 0x38, 4, "RESERVED" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" }
|
|
|
|
|
};
|
|
|
|
|
|
2010-06-17 00:21:19 +02:00
|
|
|
static const io_register_t ich2_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "GPO_TTL" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "RESERVED" },
|
|
|
|
|
{ 0x34, 4, "RESERVED" },
|
|
|
|
|
{ 0x38, 4, "RESERVED" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" }
|
|
|
|
|
};
|
|
|
|
|
|
2008-08-20 15:41:24 +02:00
|
|
|
static const io_register_t ich4_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "GPO_TTL" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" }
|
|
|
|
|
};
|
|
|
|
|
|
2010-12-17 23:34:58 +01:00
|
|
|
static const io_register_t ich5_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "GPO_TTL"},
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK"},
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
};
|
|
|
|
|
|
2010-04-21 08:23:19 +02:00
|
|
|
static const io_register_t ich6_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
};
|
|
|
|
|
|
2008-08-20 15:41:24 +02:00
|
|
|
static const io_register_t ich7_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" }
|
|
|
|
|
};
|
|
|
|
|
|
2008-12-04 16:18:20 +01:00
|
|
|
static const io_register_t ich8_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "GPIO_USE_SEL Override (LOW)" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "GP_SER_BLINK" },
|
|
|
|
|
{ 0x20, 4, "GP_SB_CMDSTS" },
|
|
|
|
|
{ 0x24, 4, "GP_SB_DATA" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3C, 4, "GPIO_USE_SEL Override (HIGH)" }
|
|
|
|
|
};
|
|
|
|
|
|
2010-05-30 14:33:12 +02:00
|
|
|
static const io_register_t ich9_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "GP_SER_BLINK" },
|
|
|
|
|
{ 0x20, 4, "GP_SB_CMDSTS" },
|
|
|
|
|
{ 0x24, 4, "GP_SB_DATA" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" }
|
|
|
|
|
};
|
2008-12-04 16:18:20 +01:00
|
|
|
|
2010-09-01 05:40:57 +02:00
|
|
|
static const io_register_t ich10_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "GP_SER_BLINK" },
|
|
|
|
|
{ 0x20, 4, "GP_SB_CMDSTS" },
|
|
|
|
|
{ 0x24, 4, "GP_SB_DATA" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3C, 4, "RESERVED" },
|
|
|
|
|
{ 0x40, 4, "GPIO_USE_SEL3" },
|
|
|
|
|
{ 0x44, 4, "GPIO_SEL3" },
|
|
|
|
|
{ 0x48, 4, "GPIO_LVL3" },
|
|
|
|
|
{ 0x4c, 4, "RESERVED" },
|
|
|
|
|
{ 0x50, 4, "RESERVED" },
|
|
|
|
|
{ 0x54, 4, "RESERVED" },
|
|
|
|
|
{ 0x58, 4, "RESERVED" },
|
|
|
|
|
{ 0x5c, 4, "RESERVED" },
|
|
|
|
|
{ 0x60, 4, "GP_RST_SEL" },
|
|
|
|
|
{ 0x64, 4, "RESERVED" },
|
|
|
|
|
{ 0x68, 4, "RESERVED" },
|
|
|
|
|
{ 0x6c, 4, "RESERVED" },
|
|
|
|
|
{ 0x70, 4, "RESERVED" },
|
|
|
|
|
{ 0x74, 4, "RESERVED" },
|
|
|
|
|
{ 0x78, 4, "RESERVED" },
|
|
|
|
|
{ 0x7c, 4, "RESERVED" },
|
|
|
|
|
};
|
|
|
|
|
|
2011-10-30 13:30:36 +01:00
|
|
|
static const io_register_t i631x_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "RESERVED" },
|
|
|
|
|
{ 0x20, 4, "RESERVED" },
|
|
|
|
|
{ 0x24, 4, "RESERVED" },
|
|
|
|
|
{ 0x28, 4, "RESERVED" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
};
|
|
|
|
|
|
2013-03-29 18:08:13 +01:00
|
|
|
static const io_register_t pch_gpio_registers[] = {
|
|
|
|
|
{ 0x00, 4, "GPIO_USE_SEL" },
|
|
|
|
|
{ 0x04, 4, "GP_IO_SEL" },
|
|
|
|
|
{ 0x08, 4, "RESERVED" },
|
|
|
|
|
{ 0x0c, 4, "GP_LVL" },
|
|
|
|
|
{ 0x10, 4, "RESERVED" },
|
|
|
|
|
{ 0x14, 4, "RESERVED" },
|
|
|
|
|
{ 0x18, 4, "GPO_BLINK" },
|
|
|
|
|
{ 0x1c, 4, "GP_SER_BLINK" },
|
|
|
|
|
{ 0x20, 4, "GP_SB_CMDSTS" },
|
|
|
|
|
{ 0x24, 4, "GP_SB_DATA" },
|
|
|
|
|
{ 0x28, 2, "GPI_NMI_EN" },
|
|
|
|
|
{ 0x2a, 2, "GPI_NMI_STS" },
|
|
|
|
|
{ 0x2c, 4, "GPI_INV" },
|
|
|
|
|
{ 0x30, 4, "GPIO_USE_SEL2" },
|
|
|
|
|
{ 0x34, 4, "GP_IO_SEL2" },
|
|
|
|
|
{ 0x38, 4, "GP_LVL2" },
|
|
|
|
|
{ 0x3c, 4, "RESERVED" },
|
|
|
|
|
{ 0x40, 4, "GPIO_USE_SEL3" },
|
|
|
|
|
{ 0x44, 4, "GPIO_SEL3" },
|
|
|
|
|
{ 0x48, 4, "GPIO_LVL3" },
|
|
|
|
|
{ 0x4c, 4, "RESERVED" },
|
|
|
|
|
{ 0x50, 4, "RESERVED" },
|
|
|
|
|
{ 0x54, 4, "RESERVED" },
|
|
|
|
|
{ 0x58, 4, "RESERVED" },
|
|
|
|
|
{ 0x5c, 4, "RESERVED" },
|
|
|
|
|
{ 0x60, 4, "GP_RST_SEL1" },
|
|
|
|
|
{ 0x64, 4, "GP_RST_SEL2" },
|
|
|
|
|
{ 0x68, 4, "GP_RST_SEL3" },
|
|
|
|
|
{ 0x6c, 4, "RESERVED" },
|
|
|
|
|
{ 0x70, 4, "RESERVED" },
|
|
|
|
|
{ 0x74, 4, "RESERVED" },
|
|
|
|
|
{ 0x78, 4, "RESERVED" },
|
|
|
|
|
{ 0x7c, 4, "RESERVED" },
|
|
|
|
|
};
|
|
|
|
|
|
2008-08-20 15:41:24 +02:00
|
|
|
int print_gpios(struct pci_dev *sb)
|
|
|
|
|
{
|
|
|
|
|
int i, size;
|
|
|
|
|
uint16_t gpiobase;
|
|
|
|
|
const io_register_t *gpio_registers;
|
|
|
|
|
|
|
|
|
|
printf("\n============= GPIOS =============\n\n");
|
|
|
|
|
|
|
|
|
|
switch (sb->device_id) {
|
2013-03-29 18:08:13 +01:00
|
|
|
case PCI_DEVICE_ID_INTEL_Z68:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_P67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_UM67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM65:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_H67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Q65:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_QS67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Q67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_QM67:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_B65:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_C202:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_C204:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_C206:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_H61:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Z77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Z75:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Q77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_Q75:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_B75:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_H77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_C216:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_QM77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_QS77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_UM77:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM76:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM75:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_HM70:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = pch_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(pch_gpio_registers);
|
|
|
|
|
break;
|
2010-09-01 05:40:57 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH10R:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = ich10_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich10_gpio_registers);
|
|
|
|
|
break;
|
2010-05-30 14:33:12 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9DH:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9DO:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9R:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9M:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH9ME:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = ich9_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich9_gpio_registers);
|
|
|
|
|
break;
|
2010-08-17 10:33:44 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH8:
|
2008-12-04 16:18:20 +01:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH8M:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = ich8_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich8_gpio_registers);
|
|
|
|
|
break;
|
2008-08-20 15:41:24 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH7:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH7M:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH7DH:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH7MDH:
|
2010-08-17 10:33:44 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_NM10:
|
2008-08-20 15:41:24 +02:00
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = ich7_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich7_gpio_registers);
|
|
|
|
|
break;
|
2010-04-21 08:23:19 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH6:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = ich6_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich6_gpio_registers);
|
|
|
|
|
break;
|
2010-12-17 23:34:58 +01:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH5:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
|
|
|
|
|
gpio_registers = ich5_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich5_gpio_registers);
|
|
|
|
|
break;
|
2008-08-20 15:41:24 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH4:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH4M:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
|
|
|
|
|
gpio_registers = ich4_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich4_gpio_registers);
|
|
|
|
|
break;
|
2010-06-17 00:21:19 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH2:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
|
|
|
|
|
gpio_registers = ich2_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich2_gpio_registers);
|
|
|
|
|
break;
|
2008-08-20 15:41:24 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_ICH:
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_ICH0:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
|
|
|
|
|
gpio_registers = ich0_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(ich0_gpio_registers);
|
|
|
|
|
break;
|
2011-10-30 13:30:36 +01:00
|
|
|
|
|
|
|
|
case PCI_DEVICE_ID_INTEL_I63XX:
|
|
|
|
|
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
|
|
|
|
|
gpio_registers = i631x_gpio_registers;
|
|
|
|
|
size = ARRAY_SIZE(i631x_gpio_registers);
|
|
|
|
|
break;
|
|
|
|
|
|
2009-09-30 19:05:46 +02:00
|
|
|
case PCI_DEVICE_ID_INTEL_82371XX:
|
|
|
|
|
printf("This southbridge has GPIOs in the PM unit.\n");
|
|
|
|
|
return 1;
|
2008-08-20 15:41:24 +02:00
|
|
|
case 0x1234: // Dummy for non-existent functionality
|
|
|
|
|
printf("This southbridge does not have GPIOBASE.\n");
|
|
|
|
|
return 1;
|
|
|
|
|
default:
|
|
|
|
|
printf("Error: Dumping GPIOs on this southbridge is not (yet) supported.\n");
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase);
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
|
switch (gpio_registers[i].size) {
|
|
|
|
|
case 4:
|
|
|
|
|
printf("gpiobase+0x%04x: 0x%08x (%s)\n",
|
|
|
|
|
gpio_registers[i].addr,
|
|
|
|
|
inl(gpiobase+gpio_registers[i].addr),
|
|
|
|
|
gpio_registers[i].name);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
printf("gpiobase+0x%04x: 0x%04x (%s)\n",
|
|
|
|
|
gpio_registers[i].addr,
|
|
|
|
|
inw(gpiobase+gpio_registers[i].addr),
|
|
|
|
|
gpio_registers[i].name);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
printf("gpiobase+0x%04x: 0x%02x (%s)\n",
|
|
|
|
|
gpio_registers[i].addr,
|
|
|
|
|
inb(gpiobase+gpio_registers[i].addr),
|
|
|
|
|
gpio_registers[i].name);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
