2008-08-20 15:41:24 +02:00
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/*
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* inteltool - dump all registers on an Intel CPU + chipset based system.
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*
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2010-04-27 08:56:47 +02:00
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* Copyright (C) 2008 by coresystems GmbH
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* written by Stefan Reinauer <stepan@coresystems.de>
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*
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2008-08-20 15:41:24 +02:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include "inteltool.h"
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int print_rcba(struct pci_dev *sb)
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{
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int i, size = 0x4000;
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volatile uint8_t *rcba;
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uint32_t rcba_phys;
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printf("\n============= RCBA ==============\n\n");
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switch (sb->device_id) {
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2010-04-21 08:23:19 +02:00
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case PCI_DEVICE_ID_INTEL_ICH6:
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2008-08-20 15:41:24 +02:00
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case PCI_DEVICE_ID_INTEL_ICH7:
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case PCI_DEVICE_ID_INTEL_ICH7M:
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case PCI_DEVICE_ID_INTEL_ICH7DH:
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case PCI_DEVICE_ID_INTEL_ICH7MDH:
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2010-09-03 11:33:50 +02:00
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case PCI_DEVICE_ID_INTEL_ICH8:
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case PCI_DEVICE_ID_INTEL_ICH8M:
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2015-03-01 10:14:15 +01:00
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case PCI_DEVICE_ID_INTEL_ICH8ME:
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2010-05-30 14:33:12 +02:00
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case PCI_DEVICE_ID_INTEL_ICH9DH:
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case PCI_DEVICE_ID_INTEL_ICH9DO:
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case PCI_DEVICE_ID_INTEL_ICH9R:
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case PCI_DEVICE_ID_INTEL_ICH9:
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case PCI_DEVICE_ID_INTEL_ICH9M:
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case PCI_DEVICE_ID_INTEL_ICH9ME:
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2010-09-03 11:33:50 +02:00
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case PCI_DEVICE_ID_INTEL_ICH10R:
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2010-08-17 10:33:44 +02:00
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case PCI_DEVICE_ID_INTEL_NM10:
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2011-10-30 13:30:36 +01:00
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case PCI_DEVICE_ID_INTEL_I63XX:
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2014-11-01 17:12:37 +01:00
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case PCI_DEVICE_ID_INTEL_3400:
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case PCI_DEVICE_ID_INTEL_3420:
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case PCI_DEVICE_ID_INTEL_3450:
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2013-05-28 11:30:25 +02:00
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case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
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case PCI_DEVICE_ID_INTEL_3400_MOBILE:
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2014-11-01 17:12:37 +01:00
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case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
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case PCI_DEVICE_ID_INTEL_B55_A:
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case PCI_DEVICE_ID_INTEL_B55_B:
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2013-05-28 11:30:25 +02:00
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case PCI_DEVICE_ID_INTEL_H55:
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case PCI_DEVICE_ID_INTEL_H57:
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case PCI_DEVICE_ID_INTEL_HM55:
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case PCI_DEVICE_ID_INTEL_HM57:
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2014-11-01 17:12:37 +01:00
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case PCI_DEVICE_ID_INTEL_P55:
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case PCI_DEVICE_ID_INTEL_PM55:
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case PCI_DEVICE_ID_INTEL_Q57:
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case PCI_DEVICE_ID_INTEL_QM57:
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2013-05-28 11:30:25 +02:00
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case PCI_DEVICE_ID_INTEL_QS57:
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2013-03-29 19:08:39 +01:00
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case PCI_DEVICE_ID_INTEL_Z68:
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case PCI_DEVICE_ID_INTEL_P67:
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case PCI_DEVICE_ID_INTEL_UM67:
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case PCI_DEVICE_ID_INTEL_HM65:
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case PCI_DEVICE_ID_INTEL_H67:
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case PCI_DEVICE_ID_INTEL_HM67:
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case PCI_DEVICE_ID_INTEL_Q65:
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case PCI_DEVICE_ID_INTEL_QS67:
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case PCI_DEVICE_ID_INTEL_Q67:
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case PCI_DEVICE_ID_INTEL_QM67:
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case PCI_DEVICE_ID_INTEL_B65:
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case PCI_DEVICE_ID_INTEL_C202:
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case PCI_DEVICE_ID_INTEL_C204:
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case PCI_DEVICE_ID_INTEL_C206:
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case PCI_DEVICE_ID_INTEL_H61:
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case PCI_DEVICE_ID_INTEL_Z77:
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case PCI_DEVICE_ID_INTEL_Z75:
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case PCI_DEVICE_ID_INTEL_Q77:
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case PCI_DEVICE_ID_INTEL_Q75:
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case PCI_DEVICE_ID_INTEL_B75:
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case PCI_DEVICE_ID_INTEL_H77:
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case PCI_DEVICE_ID_INTEL_C216:
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case PCI_DEVICE_ID_INTEL_QM77:
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case PCI_DEVICE_ID_INTEL_QS77:
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case PCI_DEVICE_ID_INTEL_HM77:
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case PCI_DEVICE_ID_INTEL_UM77:
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case PCI_DEVICE_ID_INTEL_HM76:
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case PCI_DEVICE_ID_INTEL_HM75:
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case PCI_DEVICE_ID_INTEL_HM70:
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2015-02-18 00:14:31 +01:00
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case PCI_DEVICE_ID_INTEL_NM70:
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2014-10-30 10:30:40 +01:00
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
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case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
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2015-05-15 04:58:33 +02:00
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case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
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2008-08-20 15:41:24 +02:00
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rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
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break;
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case PCI_DEVICE_ID_INTEL_ICH:
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case PCI_DEVICE_ID_INTEL_ICH0:
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2010-06-17 00:21:19 +02:00
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case PCI_DEVICE_ID_INTEL_ICH2:
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2008-08-20 15:41:24 +02:00
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case PCI_DEVICE_ID_INTEL_ICH4:
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case PCI_DEVICE_ID_INTEL_ICH4M:
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2010-12-17 23:34:58 +01:00
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case PCI_DEVICE_ID_INTEL_ICH5:
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2008-08-20 15:41:24 +02:00
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printf("This southbridge does not have RCBA.\n");
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return 1;
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default:
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printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
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return 1;
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}
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2008-12-04 16:18:20 +01:00
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rcba = map_physical(rcba_phys, size);
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2010-04-27 08:56:47 +02:00
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2008-12-04 16:18:20 +01:00
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if (rcba == NULL) {
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2008-08-20 15:41:24 +02:00
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perror("Error mapping RCBA");
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exit(1);
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}
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printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
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for (i = 0; i < size; i += 4) {
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if (*(uint32_t *)(rcba + i))
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printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
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}
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2008-12-04 16:18:20 +01:00
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unmap_physical((void *)rcba, size);
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2008-08-20 15:41:24 +02:00
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return 0;
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}
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