2015-07-31 11:10:40 +02:00
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2015 MediaTek Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
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bootblock-y += bootblock.c
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bootblock-y += cbfs.c
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2015-07-31 11:10:53 +02:00
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bootblock-y += pll.c
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2015-07-31 11:10:46 +02:00
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bootblock-y += spi.c
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2015-07-31 11:10:40 +02:00
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bootblock-y += timer.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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2015-07-31 11:10:52 +02:00
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bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c
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2015-07-31 11:10:46 +02:00
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bootblock-y += wdt.c
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2015-07-31 11:10:50 +02:00
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bootblock-y += mmu_operations.c
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2015-07-31 11:10:52 +02:00
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2015-07-31 11:10:40 +02:00
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################################################################################
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2015-07-31 11:10:46 +02:00
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verstage-y += spi.c
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verstage-$(CONFIG_DRIVERS_UART) += uart.c
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verstage-y += timer.c
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verstage-y += wdt.c
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verstage-y += cbfs.c
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################################################################################
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2015-07-31 11:10:40 +02:00
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romstage-y += cbfs.c
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romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += cbmem.c
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2015-07-31 11:10:46 +02:00
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romstage-y += spi.c
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2015-07-31 11:10:55 +02:00
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romstage-y += gpio.c
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2015-07-31 11:10:50 +02:00
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romstage-y += mmu_operations.c
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2015-07-31 11:10:40 +02:00
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################################################################################
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ramstage-y += cbmem.c
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2015-07-31 11:10:46 +02:00
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ramstage-y += spi.c
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2015-07-31 11:10:40 +02:00
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ramstage-y += cbfs.c
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ramstage-y += soc.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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2015-07-31 11:10:55 +02:00
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ramstage-y += gpio.c
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2015-07-31 11:10:46 +02:00
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ramstage-y += wdt.c
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2015-07-31 11:10:40 +02:00
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################################################################################
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2015-07-31 11:10:48 +02:00
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# Generate the actual coreboot bootblock code
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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./util/mtkheader/gen-bl-img.py mt8173 sf $< $@
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2015-07-31 11:10:40 +02:00
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include
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endif
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