2014-05-04 16:07:45 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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2014-05-05 15:40:15 +02:00
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* Copyright (C) 2013 Sage Electronic Engineering, LLC
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2014-05-04 16:07:45 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2014-05-05 15:40:15 +02:00
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#include <cbfs.h>
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2017-01-28 15:59:25 +01:00
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#include <spd_bin.h>
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2017-07-28 03:48:35 +02:00
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#include <string.h>
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2014-05-05 15:40:15 +02:00
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2018-10-14 14:52:06 +02:00
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#include <AGESA.h>
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#include <amdlib.h>
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2014-05-04 16:07:45 +02:00
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#include "Ids.h"
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2017-07-28 03:48:35 +02:00
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#include <northbridge/amd/agesa/state_machine.h>
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2017-09-08 06:14:17 +02:00
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include <northbridge/amd/agesa/dimmSpd.h>
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2014-05-04 16:07:45 +02:00
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2017-04-13 15:56:07 +02:00
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#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI)
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#if IS_ENABLED(CONFIG_ARCH_ROMSTAGE_X86_64) || \
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IS_ENABLED(CONFIG_ARCH_RAMSTAGE_X86_64)
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#error "FIXME: CALLOUT_ENTRY is UINT32 Data, not UINT Data"
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#endif
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#endif
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS GetBiosCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-05 12:20:56 +02:00
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{
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2015-01-02 21:46:32 +01:00
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AGESA_STATUS status;
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2014-05-05 12:20:56 +02:00
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UINTN i;
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2017-09-08 06:37:06 +02:00
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if (HAS_LEGACY_WRAPPER || ENV_RAMSTAGE) {
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/* One HeapManager serves them all. */
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status = HeapManagerCallout(Func, Data, ConfigPtr);
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if (status != AGESA_UNSUPPORTED)
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return status;
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}
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2015-01-02 21:46:32 +01:00
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2017-03-30 16:26:25 +02:00
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#if HAS_AGESA_FCH_OEM_CALLOUT
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if (!HAS_LEGACY_WRAPPER && Func == AGESA_FCH_OEM_CALLOUT) {
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agesa_fch_oem_config(Data, ConfigPtr);
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return AGESA_SUCCESS;
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}
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#endif
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2014-05-05 12:20:56 +02:00
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for (i = 0; i < BiosCalloutsLen; i++) {
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if (BiosCallouts[i].CalloutName == Func)
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break;
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}
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2016-08-23 21:36:02 +02:00
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if (i >= BiosCalloutsLen)
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2014-05-05 12:20:56 +02:00
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return AGESA_UNSUPPORTED;
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return BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr);
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}
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-04 16:07:45 +02:00
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{
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return AGESA_UNSUPPORTED;
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}
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-04 16:07:45 +02:00
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{
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return AGESA_SUCCESS;
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}
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-04 16:07:45 +02:00
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{
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IDS_NV_ITEM *IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr;
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if (Data == IDS_CALLOUT_INIT)
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IdsPtr[0].IdsNvValue = IdsPtr[0].IdsNvId = 0xffff;
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return AGESA_SUCCESS;
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}
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2014-05-04 22:13:54 +02:00
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-04 22:13:54 +02:00
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{
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AGESA_STATUS Status;
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UINT8 Value;
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UINTN ResetType;
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AMD_CONFIG_PARAMS *StdHeader;
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ResetType = Data;
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StdHeader = ConfigPtr;
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//
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// Perform the RESET based upon the ResetType. In case of
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2018-08-07 12:23:16 +02:00
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// WARM_RESET_WHENEVER and COLD_RESET_WHENEVER, the request will go to
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2014-05-04 22:13:54 +02:00
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// AmdResetManager. During the critical condition, where reset is required
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// immediately, the reset will be invoked directly by writing 0x04 to port
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// 0xCF9 (Reset Port).
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//
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switch (ResetType) {
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case WARM_RESET_WHENEVER:
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case COLD_RESET_WHENEVER:
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break;
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case WARM_RESET_IMMEDIATELY:
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case COLD_RESET_IMMEDIATELY:
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Value = 0x06;
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LibAmdIoWrite (AccessWidth8, 0xCf9, &Value, StdHeader);
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break;
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default:
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break;
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}
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Status = 0;
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return Status;
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}
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2014-05-05 11:05:53 +02:00
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-05 11:05:53 +02:00
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{
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2016-11-25 10:21:02 +01:00
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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2017-07-28 03:48:35 +02:00
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AGESA_STATUS status;
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AP_EXE_PARAMS ApExeParams;
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2014-05-05 11:05:53 +02:00
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2017-07-28 03:48:35 +02:00
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memset(&ApExeParams, 0, sizeof(AP_EXE_PARAMS));
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2016-11-25 10:21:02 +01:00
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if (HAS_LEGACY_WRAPPER) {
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ApExeParams.StdHeader.AltImageBasePtr = 0;
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ApExeParams.StdHeader.CalloutPtr = &GetBiosCallout;
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ApExeParams.StdHeader.Func = 0;
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ApExeParams.StdHeader.ImageBasePtr = 0;
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} else {
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memcpy(&ApExeParams.StdHeader, StdHeader, sizeof(*StdHeader));
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}
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2017-07-28 03:48:35 +02:00
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ApExeParams.FunctionNumber = Func;
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ApExeParams.RelatedDataBlock = ConfigPtr;
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2016-11-25 10:21:02 +01:00
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#if HAS_LEGACY_WRAPPER
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2017-07-28 03:48:35 +02:00
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status = AmdLateRunApTask(&ApExeParams);
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2016-11-25 10:21:02 +01:00
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#else
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status = module_dispatch(AMD_LATE_RUN_AP_TASK, &ApExeParams.StdHeader);
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#endif
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2017-07-28 03:48:35 +02:00
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2016-11-25 10:21:02 +01:00
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ASSERT(status == AGESA_SUCCESS);
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2017-07-28 03:48:35 +02:00
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return status;
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2014-05-05 11:05:53 +02:00
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}
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2017-04-13 16:01:18 +02:00
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#if defined(AGESA_GNB_GFX_GET_VBIOS_IMAGE)
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt)
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2014-05-04 22:13:08 +02:00
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{
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GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
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2015-05-16 06:39:23 +02:00
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pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak(
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"pci"CONFIG_VGA_BIOS_ID".rom",
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2014-05-04 22:13:08 +02:00
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CBFS_TYPE_OPTIONROM, NULL);
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/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
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return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
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}
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2014-10-17 21:33:22 +02:00
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#endif
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2014-10-17 21:33:22 +02:00
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-10-17 21:33:22 +02:00
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{
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AGESA_STATUS Status = AGESA_UNSUPPORTED;
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#ifdef __PRE_RAM__
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Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
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#endif
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return Status;
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}
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2014-05-05 15:40:15 +02:00
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2015-07-30 20:16:37 +02:00
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AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
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2014-05-05 15:40:15 +02:00
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{
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AGESA_STATUS Status = AGESA_UNSUPPORTED;
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#ifdef __PRE_RAM__
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AGESA_READ_SPD_PARAMS *info = ConfigPtr;
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if (info->MemChannelId > 0)
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return AGESA_UNSUPPORTED;
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if (info->SocketId != 0)
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return AGESA_UNSUPPORTED;
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if (info->DimmId != 0)
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return AGESA_UNSUPPORTED;
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/* Read index 0, first SPD_SIZE bytes of spd.bin file. */
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2017-01-28 15:26:43 +01:00
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if (read_ddr3_spd_from_cbfs((u8*)info->Buffer, 0) < 0)
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2014-05-05 15:40:15 +02:00
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die("No SPD data\n");
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Status = AGESA_SUCCESS;
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#endif
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return Status;
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}
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2017-03-30 16:26:25 +02:00
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#if HAS_AGESA_FCH_OEM_CALLOUT
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void agesa_fch_oem_config(uintptr_t Data, AMD_CONFIG_PARAMS *StdHeader)
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{
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/* FIXME: CAR_GLOBAL needed here to pass sysinfo. */
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struct sysinfo *cb_NA = NULL;
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if (StdHeader->Func == AMD_INIT_RESET) {
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET\n");
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board_FCH_InitReset(cb_NA, (FCH_RESET_DATA_BLOCK *)Data);
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV\n");
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board_FCH_InitEnv(cb_NA, (FCH_DATA_BLOCK *)Data);
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}
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}
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#endif
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