cpu/amd/pi: Use acpi_is_wakeup()

Propagate commit 9107e53 from amd/agesa and fix some
related #includes under cpu/amd/pi.

Change test to return true on S2 wakeup too. In S2 CPU would
have been powered down so MTRR recovery is required.

Change-Id: I18cb31c1124da53e5fcba2610f6b02d755feb092
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8171
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2015-01-08 20:44:30 +02:00
parent 6d28b91d38
commit dc357566ea
3 changed files with 4 additions and 8 deletions

View File

@ -33,9 +33,7 @@
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam16.h> #include <cpu/amd/amdfam16.h>
#include <arch/acpi.h> #include <arch/acpi.h>
#if CONFIG_HAVE_ACPI_RESUME #include <cpu/amd/pi/s3_resume.h>
#include <cpu/amd/agesa/s3_resume.h>
#endif
static void model_16_init(device_t dev) static void model_16_init(device_t dev)
{ {
@ -72,10 +70,8 @@ static void model_16_init(device_t dev)
msr.lo |= SYSCFG_MSR_MtrrFixDramEn; msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
wrmsr(SYSCFG_MSR, msr); wrmsr(SYSCFG_MSR, msr);
#if CONFIG_HAVE_ACPI_RESUME if (acpi_is_wakeup())
if (acpi_slp_type == 3)
restore_mtrr(); restore_mtrr();
#endif
x86_mtrr_check(); x86_mtrr_check();
x86_enable_cache(); x86_enable_cache();

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@ -1,7 +1,7 @@
#include "AGESA.h" #include "AGESA.h"
#include "amdlib.h" #include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/pi/BiosCallOuts.h>
#include "heapManager.h" #include "heapManager.h"
#include <cbmem.h> #include <cbmem.h>

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@ -31,7 +31,7 @@
#include <arch/acpi.h> #include <arch/acpi.h>
#include <string.h> #include <string.h>
#include "Porting.h" #include "Porting.h"
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/pi/BiosCallOuts.h>
#include "s3_resume.h" #include "s3_resume.h"
/* The size needs to be 4k aligned, which is the sector size of most flashes. */ /* The size needs to be 4k aligned, which is the sector size of most flashes. */