Commit graph

264 commits

Author SHA1 Message Date
Eric Biederman
8e2847c28e - For now use port 0x80 based delays in for the e7501 memory initialization.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 03:00:02 +00:00
Eric Biederman
720a8f57ef - Update e7501 northbridge.c to work in the new structure.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1710 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 02:32:23 +00:00
Yinghai Lu
8abb054c0e *** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 00:05:22 +00:00
Eric Biederman
dbec2d4090 - Bump the LinuxBIOS major version
- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21 10:44:08 +00:00
Eric Biederman
7003ba4a88 - First stab at running linuxbios without the old static device tree.
Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16 06:20:29 +00:00
Ronald G. Minnich
4fa89208a1 f'ing thing still won't work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-06 17:19:49 +00:00
Ronald G. Minnich
ed9f18d545 mods for i855pm that don't seem too wrong. ha!
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-30 22:50:13 +00:00
Ronald G. Minnich
a26c8ef2a0 add support for ICH4. more i955pm stuff.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-28 20:09:06 +00:00
Ronald G. Minnich
43dd85e7ec more fixes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-30 16:08:30 +00:00
Ronald G. Minnich
6707a45eb1 just a few changes before we hit the big fun.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-26 16:13:40 +00:00
Ronald G. Minnich
1ddc8eaddb more updates for 855
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-25 18:19:08 +00:00
Ronald G. Minnich
74bfa2c8b2 stupid ron! need to start names with a letter.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1637 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-24 22:17:33 +00:00
Ronald G. Minnich
03935036ab adding 855pm
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-23 16:43:25 +00:00
Yinghai Lu
70093f7875 Intel E7501 P64H2 ICH5R support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-01 03:55:03 +00:00