Commit Graph

53 Commits

Author SHA1 Message Date
Michael Xie 80d7c85fb9 Patch for AMD DBM690T board.
Signed-off-by:  Michael Xie <Michael.Xie@amd.com>
Reviewed-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-22 13:16:18 +00:00
Marc Jones 20ce60c9aa Change abuild ROM_IMAGE_SIZE to match the standard s_c_fam10 Config.lb.
The FAM10 code takes up more space in the uncompressed "ROMCC" portion
of coreboot. Also, It is still growing as features are added.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-25 22:56:57 +00:00
Carl-Daniel Hailfinger a149131415 Same old story: Fam10 needs more space again. My calculations say it
needs 172 more bytes, give it 512 and hope that's enough for a while.
Trivial.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23 22:54:40 +00:00
Stefan Reinauer a4b901e3ef give the fam10 code a little more space until we have the time to debug this
properly. Everybody knows this by now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-16 22:20:53 +00:00
Stefan Reinauer e989be26e6 BIOS_SPEW is log level 9. There is nothing beyound that line.
(Thus the patch is trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 12:26:12 +00:00
Myles Watson f2b380ad85 This patch changes the Config.lb files and adds Config-lab.lb files for
architectures supported by buildrom.

Myles

Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-06 22:33:50 +00:00
Myles Watson a7c92a6dc4 This patch changes all rom names that aren't coreboot.rom in Config.lb files.
I think that since the directory specifies the architecture and the
board, it is redundant information to name it something else, and it
makes it more difficult to automate the build process (buildrom).

Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-05 21:53:15 +00:00
Stefan Reinauer 8ce4a19b20 last try i hope. Building with a payload changes the result of the rom
image. Even if the rom image size is not changed, it can make the linking fail.
It's almost a heisen-bug, only there if you don't watch.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-20 01:59:43 +00:00
Stefan Reinauer c2bcc893ea give it 2k more space for abuild. let's look into this anyways, but get rid of
the impression that the cheetah on fam10 is broken just because we're using a
too new compiler for abuild. (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-20 00:24:23 +00:00
Stefan Reinauer f8ee1806ac Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 15:08:58 +00:00
Stefan Reinauer 7e61e45402 Please bear with me - another rename checkin. This qualifies as trivial, no
code is changed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 10:35:56 +00:00
Corey Osgood 8f1bd6a6bb More abuild fixes, this should be the last (trivial)
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-19 19:30:36 +00:00
Corey Osgood 56e7046cf7 Small fix to make the abuild happy, add ROM_SIZE to target/*/Config.lb,
using the default from src/mainboard/*/Options.lb (trivial)

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-19 08:07:37 +00:00
Marc Jones 2ce8bfd251 Initial AMD Serengeti_Cheetah_FAM10 platform for Barcelona support.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Reviewed-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-19 01:49:44 +00:00
Marc Jones bd88057f73 Add the AMD DB800 (AKA Salsa) mainboard.
The DB800 is the AMD LX Reference Design Kit platform.
For details see: http://www.amd.com/geodelxdb800

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-12 22:54:41 +00:00
Uwe Hermann 344e45748a Add missing license headers, minor cosmetic fixes in existing headers.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-22 10:12:49 +00:00
Uwe Hermann d83f79f3b8 AMD Norwich: minor cosmetic fixes and drop dead code (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-14 11:33:41 +00:00
Marc Jones 9c9083ba4a This patch adds support for the AMD Norwich development platform
based on the Geode LX processor.  The Norwich is the canonical
Geode reference, and will server as a good basis for other
Geode based platforms.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-04 18:47:52 +00:00
Uwe Hermann 6f278ad828 Use __PAYLOAD__ instead of PAYLOAD as replacement template for abuild.
Comment out code which currently doesn't compile. Needs fixing later.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-22 19:03:34 +00:00
Yinghai Lu 0594222ece On behalf of AMD:
Drop AMD prototype mainboards that were for internal testing & 
validation use only. 

Note: These boards could never be purchased. No reasons to worry.
Questions welcome via private mail.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-12 01:23:12 +00:00
Stefan Reinauer ca6312010d * fix the automatic build system by compressing payloads if possible
and leaving enough room for a real payload (not /dev/null)

  This is a wonderful example why "uses" sucks.

* add Config-abuild.lb for those boards that dont build with 
  the default settings and a real payload:
  arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326

* if lzma is installed and a real payload is used, try compressing
  it. 

* fix a small bug in "abuild --help"

This patch is acked by me because its due to infrastructural changes only.
Flames welcome.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-10 13:30:28 +00:00
Yinghai Lu 31ed8983c3 qemu abuild fix
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 22:57:26 +00:00
Yinghai Lu d4b278c02c AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 20:46:15 +00:00
Stefan Reinauer 42fb3164ed Uwe Hermann:
Here's a patch which makes all "option ROM_SIZE" lines use x*y format
which is a lot easier to read and modify, without having to use your
brain or a calculator ;-)

Tested with abuild, no errors.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-06 16:42:51 +00:00
Ronald G. Minnich 437f28ece9 Fix an error in the config files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-09 05:25:31 +00:00
Ronald G. Minnich d3ba4aaa24 Fall back to pre-broken settings and setup for GX2.
We lost a few things, but this is still worth it.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02 03:07:11 +00:00
Ronald G. Minnich 3716427e7f we don't need msr_init
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27 15:10:55 +00:00
Ronald G. Minnich ae11b37ea5 no fallback version
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25 20:34:52 +00:00
Ronald G. Minnich b7ac85c30d This is the change so that we can readable ldscript.ld
amd/rumba now builds.




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-28 22:01:56 +00:00
Ronald G. Minnich 2bb216a880 adding preliminary, and almost certainly wrong, rumba support.
This is just a skeleton, basically, and will most likely not even 
compile yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-27 23:46:30 +00:00
Stefan Reinauer 12142ada40 1201_ht_bus0_dev0_fidvid_mb.diff - part 3
issue 41 - fix up motherboard compilation

target configuration files. Who wants to do some major cleanup here some
time? The fixed/relative paths in payloads are nasty.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02 23:26:13 +00:00
Ronald G. Minnich ee5ee894b8 serengeti
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-24 02:45:10 +00:00
Jonathan McDowell 438938de02 Fix up default Config.lb files to help aid autobuilding of all targets.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-04 17:07:25 +00:00
arch import user (historical) 29ff7b8a30 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-1
Creator:  Stefan Reinauer <stepan@openbios.org>

fix quartet build

increase quartet image size to get it building again.
Untested since currently I do not have access to a quartet 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 16:47:56 +00:00
arch import user (historical) 3d8a7d2972 cleaning cvs leftovers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 15:39:11 +00:00
Stefan Reinauer d06b783186 make it bigger
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19 14:14:10 +00:00
Stefan Reinauer cd915e9672 No fallback image in this case
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-18 13:31:23 +00:00
Stefan Reinauer 20bd731b75 target config fixup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-16 10:38:38 +00:00
Stefan Reinauer de24e61df7 - add support for socket 754
- fix configuration creation for amd solo (doesn't compile yet)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19 10:30:32 +00:00
Stefan Reinauer f030bab1a8 get AMD Solo building again..
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-08-07 19:13:27 +00:00
Li-Ta Lo bbf16821c0 add target for amd serenade board
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-16 19:06:33 +00:00
Stefan Reinauer a28f1c3183 update configs (use etherboot for now, enable acpi)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1462 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-22 16:14:40 +00:00
Ronald G. Minnich 8aa7bccc9d from Yh Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-02 03:58:19 +00:00
Stefan Reinauer 2816e88349 use fake spdrom on quartet
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-19 12:30:07 +00:00
Stefan Reinauer f552e9317f push verbosity as high as possible
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-06 16:31:40 +00:00
Stefan Reinauer 8ccc6c23b3 merge minor solo changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-27 14:54:19 +00:00
Stefan Reinauer 5484eb6b43 rename linuxbios.rom to quartet.rom
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-27 12:52:56 +00:00
Stefan Reinauer 080038bfbd remove SMBUS_MEM_DEVICE_[START|END] traces from code.
add 8mbit example config for amd solo.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-07 14:56:48 +00:00
Stefan Reinauer 198f0ddded add missing -m32 flag to compile on opteron natively
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06 15:08:03 +00:00
Stefan Reinauer 261f2bb70a add cvsignore files for target files. Use gcc -m32 to build on AMD64
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 10:03:47 +00:00