Commit Graph

4118 Commits

Author SHA1 Message Date
Myles Watson 8f74c5878d Remove CONFIG_CPU_AMD_FAM10 & CONFIG_CPU_AMDK8 from mainboards. They should be
selected in sockets, and they aren't used yet.

Add a couple of variables to src/Kconfig for lack of a better place so that
their selects work.
Add select statements according to newconfig for some variables that were
defined but never selected in mainboard configs.

Fix #if CONFIG_VGA==1 -> #if CONFIG_VGA.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20 16:10:04 +00:00
Uwe Hermann 4e015eb674 Fix all board names in Kconfig as per wiki / vendor website.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20 13:55:35 +00:00
Myles Watson 1529576019 Correct typo. Thanks to Mark Marshall for spotting it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20 13:40:30 +00:00
Myles Watson 5ec971020f Move ITE-specific option to src/superio/ite/Kconfig.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-19 19:08:18 +00:00
Uwe Hermann 5ba7bfe7c4 Add missing SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL kconfig variable.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-19 18:55:08 +00:00
Myles Watson 42fd936de2 Fix builds of amd/db800 and digitallogic/msm800sev with smaller bootblocks.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-19 16:58:51 +00:00
Myles Watson 66f03e4b14 Unselect AP_CODE_IN_CAR in tyan/s289x. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-19 16:48:32 +00:00
Myles Watson ec0ee64da7 Clean up some #ifdef CONFIG_*
Change HAVE_FAN_CTL to be specific to the SuperIO that supports it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-19 16:21:30 +00:00
Uwe Hermann a29ad5cb09 Add EXPERT kconfig option so we can hide more advanced options
from beginners who should rather not touch them unless they know what
they do.

Also, add a random Kconfig help comment.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-18 18:35:50 +00:00
Uwe Hermann 7f30050939 Drop a duplicated implementation of failover.c.
Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-18 18:27:42 +00:00
Uwe Hermann e405327b46 Simplify Kconfig files by using "select" where possible (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4806 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-18 13:47:30 +00:00
Uwe Hermann 5c57df6c1a Drop dead/unused code (trivial).
DEBUG_SETNORTHB is never defined, and even if it was, setnorthb()
is never called anyway.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-18 13:42:50 +00:00
Ronald G. Minnich 2c1bf62d0c Remove this, we no longer need it.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4804 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-18 03:15:59 +00:00
Peter Stuge d08be7eecd Move files from src/cpu/x86/{fpu,mmx,sse}/ to x86/
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-17 15:01:00 +00:00
Myles Watson 0bc615482e Remove CONFIG_ from #defines that aren't config variables. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-17 13:25:07 +00:00
Peter Stuge d7b37b0a67 Silence src/Kconfig:349:warning: config symbol defined without type
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4801 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-17 03:00:04 +00:00
Peter Stuge f078be2cb1 Remove some more instances of including previous empty x86/fpu/Makefile.inc
Thanks to Jakob and Uwe for spotting the mistake!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-17 02:51:26 +00:00
Peter Stuge b1924301ca Drop src/cpu/x86/fpu/{Config.lb,Makefile.inc} since they are also empty
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-17 01:12:42 +00:00
Uwe Hermann d12b7030c6 Make COM port selection and BAUD rate a "choice" for better usability.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 22:39:55 +00:00
Uwe Hermann e052bb7a60 Drop duplicate version of the documentation/cbfs.txt file as discussed.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 22:07:20 +00:00
Ronald G. Minnich 5e19eee460 This is a snapshot as the availability of the systems for this
project is now uncertain, and I can't invest the remaining time
needed to get it done. 

Status is that memory is still not quite configured correctly. It is close
but here are DRAM Row Boundary registers. 
Here is coreboot
60: 10 10 20 20 20 20 20 20 00 00 00 00 00 00 00 00
This is close. But: 
60: 10 10 10 10 20 20 30 30 00 00 00 00 00 00 00 00
is the real hardware. So we are somehow missing those last slots. I think it's 
because the SPD connections and the chip connections differ, some dumping
of RAM registers differ. But it's very close. 

This is under serialice. Once we get to this point we get stuck here: 
Copying coreboot to RAM.
Copying coreboot to RAM.
Copying coreboot to RAM.

Forever. 

Here is the total config for 0:0.0 from coreboot: 
PCI: 00:00.00
00: 86 80 90 35 06 00 90 00 0c 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
40: 09 00 05 41 10 00 00 00 00 00 00 00 00 00 00 00
50: 0c 60 2a 00 00 00 00 00 00 30 33 33 33 33 33 33
60: 10 10 20 20 20 20 20 20 00 00 00 00 00 00 00 00
70: 0a 0a 00 00 00 00 00 00 67 11 5e 55 1e 02 20 2c
80: 41 28 21 00 00 00 00 00 80 01 00 f0 00 00 00 00
90: 00 00 00 00 00 a1 04 39 aa aa 0c 30 5f 08 02 07
a0: 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00
b0: 32 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 44 c0 50 11 00 c0 ff 03 00 00 df 03 20 00 00 e0
d0: 02 28 00 0e 07 00 00 00 00 00 93 b5 00 00 00 00
e0: 00 00 00 00 00 00 00 00 36 3c 00 00 00 00 00 00
f0: 00 00 00 00 3a 01 42 00 80 0f 0c 00 00 00 00 00

And from factory: 
00:00.0 Host bridge: Intel Corporation E7520 Memory Controller Hub (rev 09)
00: 86 80 90 35 46 01 90 00 09 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 6c 01
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
40: 09 00 05 41 10 00 00 00 00 00 00 00 00 00 00 00
50: 0c 20 6a 00 00 00 00 00 00 10 11 11 01 00 00 10
60: 10 10 10 10 20 20 30 30 00 00 00 00 00 00 00 00
70: 0a 00 0a 0a 00 00 00 00 44 11 5e 55 1e 02 20 2c
80: 41 28 41 00 00 00 00 00 80 01 00 f0 88 00 00 00
90: 00 00 00 00 00 aa 04 39 aa aa 0c 30 75 08 12 07
a0: 01 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00
b0: cc 00 99 55 00 00 00 00 00 00 00 00 00 00 00 00
c0: 44 c0 50 33 00 e0 60 00 67 00 28 00 30 00 00 e0
d0: 02 28 00 0e 03 00 00 00 00 00 93 b5 00 00 00 00
e0: 00 00 00 00 00 00 00 00 3a 3c 00 00 00 00 00 00
f0: 00 00 00 00 10 01 02 00 80 0f 0c 00 00 00 00 00

I want to commit this because even if I get no further, someone else might. 
Note that for serialice you need the following temporary patch as well: 
Index: src/superio/nsc/pc8374/pc8374_early_init.c
===================================================================
--- src/superio/nsc/pc8374/pc8374_early_init.c	(revision 4791)
+++ src/superio/nsc/pc8374/pc8374_early_init.c	(working copy)
@@ -29,7 +29,8 @@
 static void pc8374_enable_dev(device_t dev, unsigned iobase)
 {
 	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
+/* don't disable for now, it kills serialice */
+	pnp_set_enable(dev, 1);

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 22:07:15 +00:00
Myles Watson 3ff6358f8e Revert deletion that snuck in to 4794. Sorry.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 20:15:06 +00:00
Myles Watson 0364618fe8 Change console code to emit SPEW with DEFAULT_CONSOLE_LOGLEVEL==8.
Make MAXIMUM_CONSOLE_LOGLEVEL >= DEFAULT_CONSOLE_LOGLEVEL.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 19:29:45 +00:00
Myles Watson 04000f4642 Fix AP_CODE_IN_CAR (only selected for two boards), STACK_SIZE, and HEAP_SIZE.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 19:12:49 +00:00
Peter Stuge 2c54f90280 Drop empty cpu/x86/{mmx,sse}/{Config.lb,Makefile.inc} and remove references
Files in those directories are still used, but always with explicit path.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 18:27:13 +00:00
Peter Stuge 777e069c5a Drop enable_mmx.inc. It reads (only) "Enabling mmx registers is a noop"
abuild tested

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 17:43:46 +00:00
Uwe Hermann d65509de14 Set default ROM sizes per-board to match the ROM chip that came
with the respective board.

Of course, the user can still override the size in menuconfig.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 17:37:20 +00:00
Uwe Hermann 04b9b92952 Drop unused and useless CONFIG_MAX_PCI_BUSES.
It was added by rsmith in r2273 on 20060424, when pci_locate_device() in
src/arch/i386/include/arch/romcc_io.h in fact scanned all busses:

 - for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
 + for(; dev <= PCI_DEV(CONFIG_MAX_PCI_BUSES, 31, 7); dev += PCI_DEV(0,0,1)) {

Today this looks like:

   for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) {

and CONFIG_MAX_PCI_BUSES is never used anywhere.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 16:39:40 +00:00
Myles Watson 0f61a4fc98 Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 16:32:57 +00:00
Myles Watson 9969bdc4fb Fix IRQ9 and allow ACPI without an MP table for Tyan s289x.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 14:34:50 +00:00
Uwe Hermann 025b8a3877 Fix kconfig setup for the VIA pc2500e.
Add/drop Kconfig variables as needed.
In Makefile.inc just include Makefile.romccboard.inc with -mcpu=c3.

Build- and runtime-tested on hardware.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 13:34:32 +00:00
Uwe Hermann 776260675a Similar to r4626, change obj-y to driver-y for VIA C3 and C7.
Otherwise the following happens at runtime (tested on VIA pc2500e, C7):

  Initializing CPU #0
  CPU: vendor Centaur device 6a9
  CPU: family 06, model 0a, stepping 09
  Unknown cpu

We also change C3 as it is pretty clear that the same problem occurs there.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 10:06:18 +00:00
Uwe Hermann 709a71a3b6 Drop duplicate CPU subdirs-y entries for "../../x86/mtrr".
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 10:03:50 +00:00
Zheng Bao 289a2f5aad Add CONFIG_VGA_ROM_RUN to dbm690t and pistachio, otherwise the
VGA ROM can not run. After make, run
> ./cbfs/cbfstool ./coreboot.rom add ../vga_bios.rom   pci1002,791f.rom  optionrom
to make the final image with vga bios.

The macro vga_rom_address is out-of-date when CBFS starts play its role. it also should
be eliminated from rs690/chip.h as below. But it will cause building error on other board, which I
cant make test on.

##    Index: src/southbridge/amd/rs690/chip.h
##    ===================================================================
##    --- src/southbridge/amd/rs690/chip.h	(revision 4782)
##    +++ src/southbridge/amd/rs690/chip.h	(working copy)
##    @@ -23,7 +23,6 @@
##     /* Member variables are defined in Config.lb. */
##     struct southbridge_amd_rs690_config
##     {
##    -	u32 vga_rom_address;		/* The location that the VGA rom has been appened. */
##     	u8 gpp_configuration;	/* The configuration of General Purpose Port, A/B/C/D/E. */
##     	u8 port_enable;		/* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
##     	u8 gfx_dev2_dev3;	/* for GFX Core initialization REFCLK_SEL */
##

Don't apply above patch about rs690/chip.h before every board has been fixed.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 07:44:04 +00:00
Stefan Reinauer 9d37532bc1 this is probably in vain because this tool should use the same x86emu as
coreboot in order to produce comparable results. But, this patch drops the 
CONFIG_ from CONFIG_DEBUG because that was added by accident when we
automatically renamed coreboot variables to be consistent. "vgabios" is an
independent userspace utility, and it does not use newconfig nor Kconfig, so
it should not be converted. (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16 01:08:07 +00:00
Stefan Reinauer 61c7fbfd5e undo another accidential rename of X -> CONFIG_X (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 22:40:41 +00:00
Uwe Hermann 6ba13bbf7c Start documenting a few kconfig variables and user-visible options.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 17:49:07 +00:00
Libra Li 3e08cb72ff Fix Kconfig for technexion/tim5690.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 14:23:33 +00:00
Myles Watson b8e2027be8 Add CONFIG_GENERATE_* for tables so that the user can select which tables not
to build, but by default all the tables that are available are built.

Make PIRQ table build for qemu.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 13:35:47 +00:00
Myles Watson 45b811b135 Add Kconfig support for kontron/kt960.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 13:16:40 +00:00
Carl-Daniel Hailfinger 74cb9eb7e7 cbfs_and_run_core() did not check the return code of cbfs_load_stage()
and jumped to (void*)-1 on error.
Die properly instead.
I didn't use die() because that caused a linker error.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 23:51:05 +00:00
Myles Watson 75472d27e4 Fix high tables address calculation on cn700 with VIDEO_MB > 0.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 20:49:49 +00:00
Libra Li 9a04f17af0 Add forgotten target files for technexion/tim5690.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 03:19:33 +00:00
Myles Watson 59b2dc2cf2 White space and typo fixes. This makes it easier to compare the s2895 & s2892.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 03:09:26 +00:00
Zheng Bao cb69cb3e69 delete white trailing spaces. It is done by the perl command.
sh> perl -pi -e 's/[[:blank:]]+$//' $files
Trivial.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by:  Zheng Bao <zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 02:56:00 +00:00
Myles Watson b0575d8e1f Use CAR ck804 code with the s2892.
Reset the s2891 so the HT speed gets updated.
Remove some PANTA comments.
Add SATA init from non-CAR version.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-14 02:38:24 +00:00
Myles Watson 21ee98bf79 White space change in preparation for a patch to unify handling of ck804.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13 22:53:24 +00:00
Myles Watson fbc11edd7a Revert some garbage that snuck into my trivial change, correct a spelling error.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13 20:20:55 +00:00
Myles Watson 54913b98e5 Remove a couple more warnings. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13 20:00:09 +00:00
Uwe Hermann 95aa53a5c3 Add support for the MSI MS-6156 board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13 19:21:44 +00:00