Commit Graph

13096 Commits

Author SHA1 Message Date
Nicolas Reinecke 9ebb3f5efa lenovo/t520: Enable wake on LID and Fn key
Change-Id: Ieb23728ba171733820830e86e77a4c6d8e1cc57d
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7101
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-10-17 17:27:09 +02:00
Nicolas Reinecke 85f2e12b4f lenovo/t520: Apply ME workaround for S3 resume
Without this patch the laptop powers down after resume.

Change-Id: Ic6486fd4c4cc55b1ac5695f9d6d83fc2193b7eba
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7102
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-10-17 17:26:46 +02:00
Nicolas Reinecke a9f4299222 lenovo/t520: fix board info
Change-Id: Ieeefbe4617ea6c131236d8c94e9990f7b797192b
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7103
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-10-17 17:26:25 +02:00
Kyösti Mälkki 81da09e889 asus/m5a88-v: Fix southbridge init
This amdfam10 board was by mistake modified with commit

   b6f3da4 AGESA CIMx: Move late init out of get_bus_conf()

Change-Id: I8edf6f7f4cc635d31e7e485e3f6de57ef8ed7b1e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7104
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-10-17 17:26:05 +02:00
Nicolas Reinecke de72d439bf lenovo/t520: Use native LVDS gfx init
As introduced in:
1783a3c ivybridge: LVDS gfx init.

The panel on the T520 is a LP156WD1 40 pin LVDS (2 ch, 6-bit).
Tx parameters derived from datasheet table.

Change-Id: Ib733836e3233a7f14a79f36a27ed36b638e837f5
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7100
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-10-17 17:25:11 +02:00
Nicolas Reinecke df5a91dd0e lenovo/T520: Remove butterfly DSP init.
It's specific to butterfly. Doesn't do anything on lenovos.

Change-Id: I98b7c3199de5d8515bd869936e1b95847321d264
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/7099
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 17:24:04 +02:00
Philipp Deppenwiese 93643e362d Fix ICH spi implementation which reads data from different chips.
This patch adjusts the read timeout in order to support flash chips
which needs more than 60ms to complete a spi command.

This problem can be reproduced on a Thinkpad T520 with M25PX64 spi chip ( suspend to ram bug ).

Change-Id: I22b2e59f1855ead6162a292b83b9b854b55c0235
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: http://review.coreboot.org/7105
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-10-17 17:19:42 +02:00
Vladimir Serbinenko 7f7fb6f9ba macbook21: Kill empty gpe.asl
Change-Id: I4ed04ecbc9e11200577cc2b6ede0e05af9f346fa
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7082
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-10-17 14:55:50 +02:00
Vladimir Serbinenko d4776c3b16 macbook21: Kill empty Makefile.inc
Change-Id: I2d946b9d757cc6158ff7f8927a81d7bf03a2e062
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7084
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 14:37:30 +02:00
Stefan Reinauer 6023ca4970 Kconfig: move SMBIOS related options to SMBIOS table option
Change-Id: I74943d0248f49796b9d31d6ed827c69f8cea13a5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7090
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-17 14:37:13 +02:00
Vladimir Serbinenko 007dbe130f macbook21: Kill empty smi.h
Change-Id: I387bb6154fe432ef2fc5f92faca69e67d7a6370a
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7083
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 14:37:08 +02:00
Stefan Reinauer 58470e39b3 Kconfig: clean up options in top level and device menu
Move generic options to the "General Setup" menu.
Move device specific options to the "Devices" menu.

Change-Id: I514a021305d43f026b24fd3016477300700ed401
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7089
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-17 14:36:53 +02:00
Vladimir Serbinenko 06c788db1a bd82x6x: Consolidate common GNVS init
Change-Id: Iea035f80695623e4e8d53eea7e3ec294d868fb5b
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7053
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-17 12:48:12 +02:00
Vladimir Serbinenko 1aff2e97ea macbook21: Kill empty mainboard.asl
Change-Id: I29c7d367df7d1ce911f6cd7ed5e5c56865b41dcc
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7063
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 12:47:04 +02:00
Scott Radcliffe f5fcedfbc4 drivers/spi: Add support for Micron N25Q128
Support added for Micron N25Q128 SPI flash, which has
the same manufacturer id as ST Micro. Jedec ID =
0x20 0xBB 0x18. Since existing stmicro.c only compares
the last device id byte, this flash is mistakenly
identified as M25P128, which has ID = 0x20 0x20 0x18.

To handle this situation and avoid breaking code for
existing devices, a two byte .id member is added.
New devices should be added to the beginning of the
flash table array with .idcode = STM_ID_USE_ALT_ID and
.id = the two byte jedec device id.

A 4KB subsector erase capability is added and used for
this new device. It requires using a different SPI
op-code supported by adding .op_erase member. Previous
devices defined in stmicro.c are assigned their original
op-code for 64KB sector erase.

N25Q128 is now working on a custom designed Bayley Bay
based board. Tested by verifying the MRC fastboot cache
is successfully (re)written. Note that previous devices
were not retested.

Change-Id: Ic63d86958bf8d301898a157b435f549a0dd9893c
Signed-off-by: Scott Radcliffe <sradcliffe@microind.com>
Reviewed-on: http://review.coreboot.org/7077
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-10-17 11:27:07 +02:00
Nico Huber 08c7018050 libpayload: Don't use default path for kconfig
libpayload's kconfig is totally incompatible with other kconfig versions,
today. Using other versions just doesn't work any more, so don't use the
overridable $(obj)/util/kconfig path. Choose a path that reflects the
incompatibility: $(obj)/util/lp_kconfig, instead.

This whole every-(sub)project-has-it's-own-patched-kconfig-version makes
me really, really sad :'-(

Change-Id: I964772f3323dc20aa7c1cc26a384a2fbca1dbb5e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/7061
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-17 11:25:10 +02:00
Nico Huber cbe3c7050f libpayload: Fix missed CONFIG_ -> CONFIG_LP_ substitutions
Change-Id: I1c64a9a649398ebe2eda179907c470f99caa9fc3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/7056
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-17 11:24:15 +02:00
Vladimir Serbinenko 3dc12c1e19 bd82x6x: Consolidate early native USB init
Change-Id: I6189930fd3c69c3497e4cf1a78035e6614761b13
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6923
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-10-17 11:05:47 +02:00
Stefan Reinauer cb0d772eef Add board_info for all Google/Intel boards mitting the file
Change-Id: Iac53462ab3621d96ba15e2fde2800212584246db
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7072
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 10:12:08 +02:00
Vladimir Serbinenko b752e4f402 acpi_add_ssdt_pstates: Remove function.
Nowhere in database p_state_num is set. So this whole function ends up
being a noop. Moreover the offsets used by it are wrong with any
optimizing iasl. Remove it in preparation of move to per-device ACPI.

Change-Id: I1f1f9743565aa8f0b8fca472ad4cb6d7542fcecb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7012
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 10:04:12 +02:00
Vladimir Serbinenko af4d66edf8 xe7501devkit: Kill unused cmos.layout
Change-Id: I04b485945a1830deaf5a695507ea81809edbceeb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7073
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 10:03:42 +02:00
Vladimir Serbinenko f21271edb5 Fix mismerge of ACPI patches
Change-Id: I2a9960861465f4686113213d5e5793333b6274b2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7079
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-17 09:31:28 +02:00
Ronald G. Minnich 833bf20f92 RISCV: add this architecture to cbfstool
Change-Id: I6d972e595f12585cda08e1a6d2b94b4bf4f212f5
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/7067
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-16 18:05:13 +02:00
Vladimir Serbinenko a9db82fbaf smbios: Mark laptops as such
Change-Id: I179a4cede2f826f72a400208748798737216c01a
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7071
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2014-10-16 17:42:25 +02:00
Ronald G. Minnich 2adb297cf9 uarts: 32/64 cleanup
We had lots of casts that caused warnings when compiling on RISCV.
Clean them up.

Change-Id: I46fcb33147ad6bf75e49ebfdfa05990e8c7ae4eb
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/7066
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-16 17:41:14 +02:00
Ronald G. Minnich ff178beee5 lib/cbfs: more cleanup for 32/64 issues
Change-Id: I5499a99cec82b464c5146cfc2008d683d079b23a
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/7068
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-16 17:40:38 +02:00
Ronald G. Minnich f33d270d97 cbmem: 64/32 cleanup
Change-Id: I4b55b635cc233a9d48b284623399277d941b0d5a
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/7069
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-10-16 17:40:06 +02:00
Ronald G. Minnich 6d7de4f64f qemu-armv7: 32/64
This really is not critical but we might as well get it right.

Change-Id: Ifec1e8dc35d7f5bb89d9a7a877d82410c83a3288
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/7070
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-10-16 17:34:19 +02:00
Patrick Georgi 96afb6ff21 libpayload: also support armv7-a toolchain
Change-Id: I9b80b72de96fb28489dcc8547b8f748ea4fcc355
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7074
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16 15:54:16 +02:00
Vladimir Serbinenko 0253ee0ce4 x220, x230: Remove unused headers.
Change-Id: Ia85e3b588c0e255e5c0f77114f051130596ce8d5
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6922
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16 15:34:29 +02:00
Vladimir Serbinenko 332f14b60b bd82x6x: Move common bd82x6x S3 detect to bd82x6x code.
Change-Id: I9ba1fa5f9ad38cb619466c6199eacd219bc53281
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6921
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16 14:46:55 +02:00
Vladimir Serbinenko c845b43f0a sandybridge: Move common northbridge finalize to northbridge code.
Change-Id: I6d4178e5aaffc1330b0953b0601bf6b448250a8e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6920
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16 14:18:04 +02:00
Vladimir Serbinenko dca2c468fc lenovo/{x2,t5}{2,3}0: Remove butterfly DSP init.
It's specific to butterfly. Doesn't do anything on lenovos.

Change-Id: I7b607196733225eace0f5e70b4cc02651488aa74
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6841
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16 14:04:38 +02:00
Vladimir Serbinenko 6985d4ee07 amdk8: Move to per-device ACPI
Change-Id: I485791015aa7eaabba53813945c216f5725554b1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6948
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-16 13:35:53 +02:00
Vladimir Serbinenko 822bc65b0e ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
As currently many systems would be barely functional without ACPI,
always generate ACPI tables if supported.

Change-Id: I372dbd03101030c904dab153552a1291f3b63518
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4609
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-16 12:01:10 +02:00
Vladimir Serbinenko 0e64617d7d i945: Convert to per-device ACPI
Change-Id: Iee3ee33ca58b8c722d2d38aae31e7130032512ad
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6804
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-15 10:54:36 +02:00
Vladimir Serbinenko 33769a5caa gm45: Convert to per-device ACPI
Change-Id: Ib04b03b2dc2ad3bfa886b43df9dd6518bbb46e3f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6803
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-15 10:54:27 +02:00
Scott Radcliffe 8ffc085e1a intel/fsp_baytrail: Add padding so device_nvs location matches ACPI
The offset of the device_nvs in the gnvs struct is expected to be
0x1000. It is actually 0x100 so padding is needed to move device_nvs
to the expected location. ACPI references to device_nvs objects will
be correct with the padding.

This was tested using a Micro Industries customized Baytrail-I board
based on the Intel Bayley Bay CRB. In intel/baytrail/nvs.h, there's
a Google customized structure located at 0x0100-0x0FFF that is
removed from the fsp_baytrail/nvs.h which explains the mismatch here.

Change-Id: I4721a79b53b5b3345ff9b0c053bdd31d2cf9cb61
Signed-off-by: Scott Radcliffe <sradcliffe@microind.com>
Reviewed-on: http://review.coreboot.org/7038
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-10-14 18:59:22 +02:00
Scott Radcliffe bf9d6a8567 baytrail: Add padding to the end of device_nvs to match ACPI
ACPI globalnvs.asl expects the gnvs memory area size to be 0x2000.
Padding has been added to device_nvs struct to reserve the full
0x2000 bytes for gnvs usage.

No known issues are caused by having the GNVS area shorter than
what ACPI thinks. Since there's nothing defined in this area,
O/S shouldn't try to access it. Only problem might be if O/S
notices the SSDT is located within the GNVS defined area.

I verified that the next table written to memory (SSDT) is 0x2000
past GNVS start using a custom-designed Baytrail-I motherboard
based on the Intel Bayley Bay CRB.

Change-Id: I9792954c7a3403eba6f37d7e53ea4a9ed3a2e4ac
Signed-off-by: Scott Radcliffe <sradcliffe@microind.com>
Reviewed-on: http://review.coreboot.org/7039
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-10-14 18:59:07 +02:00
Scott Radcliffe 375e6ce4ae intel/fsp_baytrail: Clear the GNVS area prior to filling
Zero out the GNVS area so that uninitialized portions are defined.

Tests using Microsoft Windows (XP/7/8) gave a bluescreen bugcheck: A5
(ACPI_BIOS_ERROR) with the first parameter (0x00001000)
(ACPI_BIOS_USING_OS_MEMORY). Some ACPI enumerated devices use the
GNVS area to define whether they're enabled and their MMIO regions.
On my custom baytrail-based board and build, these devices were
disabled but GNVS had uninitialized data indicating the devices
were enabled with improper MMIO regions.

Should investigate further to see where the GNVS device values are
set if enabled and make sure they're set to valid values even when
the devices are disabled via the mainboard/devicetree.cb.

Change-Id: I2b575c65bfaab58ae6206ac6f457c259c27a7d97
Signed-off-by: Scott Radcliffe <sradcliffe@microind.com>
Reviewed-on: http://review.coreboot.org/7040
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-10-14 18:58:46 +02:00
Vladimir Serbinenko 9310df8d03 acpi: Don't add an empty SSDT.
It's harmless but useless.

Change-Id: Iaaa5f6933d120a2071b2e32e62e36e63afa96be3
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7043
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Tested-by: build bot (Jenkins)
2014-10-11 09:56:09 +02:00
Vladimir Serbinenko 0a66991a34 acpi: Remove explicit pointer tracking in per-device ssdt.
It's useless and error-prone.

Change-Id: Ie385e147d42b05290ab8c3ca193c5c871306f4ac
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7018
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-11 04:08:42 +02:00
Vladimir Serbinenko 334fd8e28b bd82x6x, ibexpeak, lynxpoint: Declare NVSA before its use.
Windows chokes if it's not the case.

Change-Id: I3df15228ed00c3124b8d42fc01d7d63ff3fe07ba
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7017
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-10-11 04:08:15 +02:00
Vladimir Serbinenko bf3e2dfaaf early section: Don't add empty .car.cbmem_console.
With handling of this section removed it confused the linker.

Change-Id: Id096c1642c0bfed1007a4b7d7dfa89f8b4ffcae1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7042
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-10-11 04:00:19 +02:00
Vladimir Serbinenko 9215a89f1c via/epia-m: Switch to per-device ACPI
Change-Id: Ic63fc1f933fff5cd58adcd4299c4ac2a62c4bb68
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6941
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-10-10 20:19:10 +02:00
Vladimir Serbinenko 6b330f2a24 lynxpoint: Change OEM table ID for serialio.
According to ACPI spec all SSDTs should have distinct OEM table ID.
We end up with 2 SSDTs named "COREBOOT". Fix this.

Change-Id: I01bccb72758baf51c6b4263778716f4bb9d438c9
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7016
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-10 08:55:48 +02:00
Vladimir Serbinenko 7309c64d48 bd82x6x, ibexpeak, lynxpoint: Ensure 0-filling of uninited GNVS vars.
Change-Id: I672c3ca9e7f30a21330cf1920a25b1ab38b3f282
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7015
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-10 08:55:26 +02:00
Vladimir Serbinenko 60fccdc3d2 acpi_create_mcfg_mmconfig: Zero-out the structure before filling.
Otherwise "reserved" fields end up with a garbage instead of predictable
value.

Change-Id: I8a036769a8f86f1d6752651601de2800f4f1bd00
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7014
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-10 08:54:58 +02:00
Kayalvizhi Dhandapani 762d53d418 intel/fsp_baytrail: Include header for "southcluster_smm_save_gpio_route"
Fix the error 'implicit declaration of function
"southcluster_smm_save_gpio_route"', when SMM module is added.

Change-Id: Ia050ab7e2b036541537b645d3fe4dc747cd1dff8
Signed-off-by: Kayalvizhi Dhandapani <kayalvizhid@ami.com>
Reviewed-on: http://review.coreboot.org/7024
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-10-09 22:09:51 +02:00
Kayalvizhi Dhandapani a16055ae8a intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module added
Change-Id: I6d8622c7f343619b915442d8056aa6672dfc4f6e
Signed-off-by: Kayalvizhi Dhandapani <kayalvizhid@ami.com>
Reviewed-on: http://review.coreboot.org/7025
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-10-09 22:09:25 +02:00