Commit Graph

10743 Commits

Author SHA1 Message Date
Patrick Georgi 20e2f3c6e4 x86/smm/smihandler.c: break case in switch
The case doesn't look like a deliberate fall-through,
since the next case (SNB/IVB/HSW) is more specific
than the one before it, so break out.

Change-Id: I55497aefe9e835842a82121270f2b2a9952f560d
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6571
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-08-11 17:03:45 +02:00
Edward O'Callaghan e3cdbbeb8e northbridge/intel/*/gma.c: Remove dead code
Remove some dead coded spotted in Clang builds.

Change-Id: Ia23e16eae76593eee249e0894ef1d704a274616f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6130
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-11 16:12:07 +02:00
Furquan Shaikh 133096b6dc coreboot classes: Add dynamic classes to coreboot
Provide functionality to create dynamic classes based on program name and
architecture for which the program needs to be compiled/linked. define_class
takes program_name and arch as its arguments and adds the program_name to
classes-y to create dynamic class. Also, compiler toolset is created for the
specified arch. All the files for this program can then be added to
program_name-y += .. Ensure that define_class is called before any files are
added to the class. Check subdirs-y for order of directory inclusion.

One such example of dynamic class is rmodules. Multiple rmodules can be used
which need to be compiled for different architectures. With dynamic classes,
this is possible.

Change-Id: Ie143ed6f79ced5f58c200394cff89b006bc9b342
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/6426
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-11 15:42:20 +02:00
Vladimir Serbinenko 9d2cb7c11e i82801ix: Declare gen decode registers.
Change-Id: I999818833c9040eb4f4e19c313b5e9be216ffd86
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6585
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-11 09:12:29 +02:00
Patrick Georgi 3108b1aa1b lint: always remove temporary files
In the error case, they survived.

Change-Id: I15167be12ff9ee03f1b3bb86b93f20cb5be02b10
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6583
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11 08:37:26 +02:00
Patrick Georgi 4ef309e85d board-status: avoid shell error
[ $3 -eq 1 ] fails if no third argument is given.
[ "$3" -eq 1 ] still fails.

Doing a string comparison is robust across shells.

Change-Id: I3ee388fdbe51b7ab9344d86e67827654714d3191
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6576
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-08-11 08:21:45 +02:00
Martin Roth bfca984b78 soc/intel/fsp_baytrail: set up for including irqroute.h twice
irq_helper.h intentionally gets included into irqroute.asl twice - once
for pic mode and once for apic mode.  Since people are used to seeing
guard statements on the .h files, add the guards to irqroute.h and add
a comment to irq_helper.h explaining why they aren't there.  Add a
time.

Change-Id: I882cbbff0f73bdb170bd0f1053767893722dc60a
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6572
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11 07:22:58 +02:00
Daniele Forsi 61f767f6a4 .gitignore: add 3 executables that can be built in util/
Change-Id: I16aa154ae0b6f21d5e160a950d39013820d7503c
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6578
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11 06:26:01 +02:00
Patrick Georgi 466ea0c3d3 board-status: remove whitespace
Change-Id: I76ae5e294c157e73d07fd30cdb1c191d78efd5eb
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6581
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11 06:24:40 +02:00
Vladimir Serbinenko d668cceae0 gm45: Set default VGA PCIID.
Change-Id: I2eba1ca27c1f8181a9c6288f6794922915575790
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6586
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-11 00:46:47 +02:00
Vladimir Serbinenko b359adebc5 lenovo/h8: Remove useless smi.h include.
It's not really used.

Change-Id: I760d5a4cbe46d17ef37ea34e29eecdb0721cb945
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6588
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-11 00:46:33 +02:00
Gabe Black c1a20f0cb8 LZMA: Add a version of ulzma which takes the input and output buffer sizes.
This new version is used to implement the version which doesn't take the
input and output buffer sizes.

Old-Change-Id: I8935024aca0849bc939263d7fc3036c586e63c68
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65510
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 465d167ad2f6a67d0b2c91fb6c68c8f9a09dd395)

libpayload: Make lzma truncation non-fatal.

If the size the lzma header claims it needs is bigger than the space we have,
print a message and continue rather than erroring out. Apparently the encoder
is lazy sometimes and just puts a large value there regardless of what the
actual size is.

This was the original intention for this code, but an outdated version of the
patch ended up being submitted.

Old-Change-Id: Ibcf7ac0fd4b65ce85377421a4ee67b82d92d29d3
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66235
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 30c628eeada274fc8b94f8f69f9df4f33cbfc773)

Squashed two related commits and updated the commit message to be
more clear.

Change-Id: I484b5c1e3809781033d146609a35a9e5e666c8ed
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6408
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-10 22:29:51 +02:00
Julius Werner 586460b242 cbfs: Check return value of map() for error
The CBFS core checks the result of a media->map() operation in multiple
places for CBFS_MEDIA_INVALID_MAP_ADDRESS, suggesting that this is a
valid response. However, it ironically fails to do so when actually
mapping the CBFS file itself, which can fail on buffer-constrained
systems since the size is much larger than when mapping metadata. This
patch adds a check with an error message and a NULL pointer return for
that case to make it easier to understand this condition.

Change-Id: Icae3dd20d3d111cdfc4f2dc6397b52174349b140
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174951
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 63f2c4465f9633a637186e69bc3862d5413106ac)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6537
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 22:28:10 +02:00
Stefan Reinauer 141512161b vboot: Implement VbExGetTimer using monotonic timers
On x86 VbExGetTimer() uses rdtsc. However, on all
other platforms, let's just use coreboot's monotonic timers.

Change-Id: I0cd359f298be33776740305b111624147e2c850d
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/169620
(cherry picked from commit e910bb17522d5de42c0fc3cc945278e733fa2553)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6534
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 22:26:58 +02:00
Stefan Reinauer 7cb01e0bcf drivers: Add I2C TPM driver to coreboot
On ARM platforms the TPM is not attached through LPC but through I2C.
This patch adds an I2C TPM driver that supports the following chips:
 * Infineon SLB9635
 * Infineon SLB9645
In order to select the correct TPM implementation cleanly, CONFIG_TPM
is moved to src/Kconfig and does the correct choice.

Old-Change-Id: I2def0e0f86a869d6fcf56fc4ccab0bc935de2bf1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/167543
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit b4049a0e96f6335a93877e1e884f9a440487c421)

i2c tpm: Remove mostly useless delay code/tables.

I assume from the code in the TPM driver that the TPM spec defines
different types of delays and timeouts which each have a particular
duration, and that the TPM can tell you how long each type is if you ask
it. There was a large table, some members of a data structure, and a
function or two which managed the timeouts and figured their value for
different operations.  The timeout values for the various "ordinals"
were never set in the vendor specific data structure, however, and
always defaulted to 2 minutes.  Similarly the timeouts a, b, c, and d
were never overridden from their defaults.  This change gets rid of all
the timeout management code and makes the "ordinal" timeout 2 minutes
and the a, b, c, and d timeouts 2 seconds, the larger of the two default
values.

This is a port from depthcharge to coreboot, original change:
https://chromium-review.googlesource.com/#/c/168363/

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>

Old-Change-Id: I79696d6329184ca07f6a1be4f6ca85e1655a7aaf
Reviewed-on: https://chromium-review.googlesource.com/168583
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit b22395a73f361c38626911808332a3706b2334fe)

TPM: Stop requesting/releasing the TPM locality.

The locality is requested when the TPM is initialized and released when
it's cleaned up. There's no reason to set it to the same thing again and
restore it back to the same value before and after every transaction.

forward ported from https://chromium-review.googlesource.com/#/c/168400

Old-Change-Id: I291d1f86f220ef0eff6809c6cb00459bf95aa5e0
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/168584
Reviewed-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit cc866c20c6f936f349d2f1773dd492dca9bbf0c1)

Squashed three commits for the i2c tpm driver.

Change-Id: Ie7a50c50fda8ee986c02de7fe27551666998229d
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6519
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 22:25:48 +02:00
Steven Sherk e17843c4a7 cbfs: Fix overwalk on file scan
A bootblock overwalk was occuring when deriving the actual
length, the bootblock size was not taken into account and bootblock
size was not aligned.

Resolved merge conflict.

Change-Id: I7eb42f8deaaf223dcf07b37bb7dde4643acd508f
Signed-off-by: Steven Sherk <steven.sherk@se-eng.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65989
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Steve Sherk <ssherk70@gmail.com>
Tested-by: Steve Sherk <ssherk70@gmail.com>
(cherry picked from commit 20b0ba479b01755fbdc7f3dd9214e8af923402ba)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6539
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-10 22:25:07 +02:00
Julius Werner 1f5487a7c0 coreboot_tables: reduce redundant data structures
There are three coreboot table tags that all define some kind of memory
region, and each has their own homologous struct. I'm about to add a
fourth so I'll just clean this up and turn it into a generic struct
lb_range instead.

Change-Id: Id148b2737d442e0636d2c05e74efa1fdf844a0d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167154
(cherry picked from commit 22d82ffa3f5500fbc1b785e343add25e61f4f194)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6456
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-10 22:23:19 +02:00
Duncan Laurie 579538b5c7 lynxpoint: Add interrupt for GPIO controller in ACPI device
The GPIO controller uses IRQ14 as an active high level triggered
source for GPIOs that are configured to trigger shared interrupt.

This was also tested on bolt by configuring the touchscreen to use
a shared GPIO interrupt:

localhost ~ $ grep atmel_mxt_ts /proc/interrupts
54:    24    188    93    124    LP-GPIO-demux    atmel_mxt_ts

Change-Id: I3765120112bae11407e5b2020399d0d0b8e3cef8
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171901
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 63a0c80ce5a19410d0608fede5a9fe0ec1c8e5c1)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6541
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-10 22:20:56 +02:00
Duncan Laurie d988b612c7 bolt: Set GPIO29 as input in S0, output+high in S3/S5
This resolves WiFi issues after suspend/resume.

It needs related SPI descriptor soft strap change to
enable SLP_WLAN as a GPIO instead of owned by the ME.

Change-Id: I03f4458d1e52a913770d391061baa6cfa41e8558
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170577
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit cf1fe0524ad4793c8c422dc3fed3007b7fc96038)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6533
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-10 22:19:58 +02:00
Ronald G. Minnich cff6667eba exynos5420: Tighten up displayport timing loops
We were running this loop 100 times with 5 ms delays. Change it
to run 500 times with 1 ms delays, which gives us the same
overall timeout but lets us bail out a bit sooner -- in practice,
at most, 4 ms sooner but every bit counts. Note, however, that
the tighter timing does reduce opportunities for threading. There
is a non-obvious set of tradeoffs on timeouts.

Change-Id: I4af671c2a791aa92e446e66ac2fe5710d1e6aa4c
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/167387
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: ron minnich <rminnich@chromium.org>
Tested-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 575e910127dc74416018f182ef27ef223e61daef)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6543
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-08-10 22:19:16 +02:00
Julius Werner 985ff36bee armv7: Support stack dump after exceptions
This patch enhances the armv7 exception handlers in Coreboot and
libpayload to show the correct SP and LR registers from the aborted
context, and also dump a part of the current stack. Since we cannot
access the banked registers of SVC mode from a different exception mode,
it changes Coreboot (and its payloads) to run in System mode instead. As
both modes can execute all privileged instructions, this should not have
any noticeable effect on firmware operation (please correct me if I'm
wrong!).

Change-Id: I0e04f47619e55308f7da4a3a99c9cae6ae35cc30
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170045
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit d0db2f5e938200e3f5899c5e1f1606ab2dd5b334)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6538
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 22:18:50 +02:00
Patrick Georgi 802ad52180 ifdtool: Provide bounds on string parser
While the result will not be pretty (ie. ifdtool will
mis-parse string components longer than 255 characters),
at least it doesn't overflow stack variables anymore.

Change-Id: I263c5cf823a2d8a863dcece7c4ee0b26475f9fc4
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6562
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-08-10 18:50:30 +02:00
Aaron Durbin a438049422 model_106cx: don't blindly set Kconfig settings
The CPU_ADDR_BITS was being unconditionally set.
Don't do that.

Change-Id: Idbc63328fade8f5f05f7f46282139b86e6694989
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/169711
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 858f96d28d8d0aeffe58e1d4d1d559ad161aab66)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6535
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-10 16:34:46 +02:00
Duncan Laurie ba2468d885 falco: Add support for Samsung memory
New SPD and update to the SPD map.  Add both a 4GB and 2GB option.

4GB = RAM_ID{1,1,0}
2GB = RAM_ID{1,1,1}

Original-Change-Id: I37318c1b5a6ee84b7c55da00d326f10fe8af6f1e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 7eb5a4ef1062a34e883c3f356ab0dc00ba07910d)

Change-Id: I0f35a7f5191fefeb5910a2d28aea153516d9a11d
Reviewed-on: https://chromium-review.googlesource.com/171693
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit b02fa777aa5935021b2c69f7345dffd111cbd118)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6545
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 13:01:57 +02:00
Gabe Black b404511f13 ARM: Eliminate the unused interrupts.c.
This file isn't compiled into anything, and probably wouldn't since it has a
lot of baggage from it's U-Boot origins.

Change-Id: I29d87afd2a283010a653d3d48fdd3a79622e3b99
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/170423
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: David Hendrix <dhendrix@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 1146c570f0e448f7db4ec82749e91099c946a2dc)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6544
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2014-08-10 13:00:54 +02:00
Gabe Black 7d8a91d0a5 exynos: Get rid of the unused reset.c.
The source file reset.c, present in both the exynos5250 and 5420 directories,
is not being built for either SOC. Let's get rid of the clutter.

Change-Id: Iab4c7982a271d08cbaf3207b6f5431f0ef52697e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/170402
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: David Hendrix <dhendrix@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 0ce3898276ff49d171a0d8a650806f0305c0576f)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6542
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-10 13:00:31 +02:00
Furquan Shaikh cb61ea7a13 Falco/Slippy: Patch to remove redundant graphics initializations
gma_fui_init repeats the initializations already performed in gma_setup_panel.
These redundant initializations reset any gtt settings done before this call.
Hence, they had to be done again after call to gma_fui_init. However, the call
gma_fui_init is not required at all. Does not affect the behavior of suspend/resume.

Old-Change-Id: Idfb9f9930624694b878ddc0fe8648b3c8dd80e55
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65997
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit c376aea1b89c9a829874d5c657693993a3bb1f13)

Falco/Slippy: Patch to fix garbage on screen during graphics initialization in normal mode

Depending on the init_fb parameter:
1) For normal mode, first page is filled with zeroes and setgtt is used make all GTT entries point to this
same page
2) For developer/recovery mode, we init the gtt to consecutive pages

Old-Change-Id: I281b0b7efe01f7892e98b19ff9a63c04b087bd2c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65633
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 97c99dfe52ef3a87d387fdbf27ad3a28ad81c722)

Squashed two graphics related commits for Falco/Slippy.

Change-Id: I7ddb92672c026fe66f9fb0caba9d8fdc3f8a9d0a
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6536
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 13:00:12 +02:00
Paul Menzel 0f027e421a libpayload: hexdump.c: Change type of length argument to size_t
Representing a (non-negative) length with a signed integer is not
optimal, so change its type to `size_t`.

Change-Id: Ic0c2b7e081ba32d917409568ee53007d9ab7f8f3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4768
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-10 08:30:07 +02:00
Paul Menzel d0cdcaeb08 southbridge/ricoh,ti: Remove trailing whitespace in debug output
Change-Id: If58854c35dce83bf6db7a84a8cb441cc3e60d6d4
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/6529
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 08:27:41 +02:00
Gabe Black 9ed8a82d26 serial: Separate the serial hardware init and the serial console init.
You might want to use the serial hardware for something other than a console,
or you might want to intercede in the serial stream to wrap it in another
protocol. This is what you'd do to send output to GDB while using it to debug
the payload.

Change-Id: I2218c0dbb988dacb64e5bdaf5d92138828eff8b6
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/179559
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit da9ab46d974745125fe7d8b29ce43336c3586cd5)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6547
Tested-by: build bot (Jenkins)
2014-08-10 08:26:48 +02:00
Patrick Georgi e211bd9b78 src/lib/edid.c: missing break statement
While vendor specific extension blocks are mostly opaque to us,
they're not exactly "unknown".

Change-Id: I9136c04d12045ad13ef4f942c0814c4df88bdf6b
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6563
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10 08:21:25 +02:00
Patrick Georgi a65c21eeb5 cbfstool: free stale memory
The process probably terminates not much later, but in
case anyone reuses the function in something with
longer life-time, free unused resources.

Change-Id: I10c471ee3d9dc9a3ebf08fe4605f223ea59b990e
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6559
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-10 08:20:30 +02:00
Patrick Georgi c5d179123d nvramtool: check for successful seek
Otherwise the following write might end up anywhere.

Change-Id: Ie42d984824e9308bd58b8bb905b6ea823543adf0
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6560
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-10 08:20:09 +02:00
Patrick Georgi b6239b81aa romcc: properly check out-of-range unsigned longs
Testing if an unsigned long is greater than ULONG_T_MAX isn't very
useful. The second half of the test checked for too small values
(ie. <= -ULONG_T_MAX).

In both cases errno is set to ERANGE, so just check for that.

Change-Id: I92bad9d1715673531bef5d5d5756feddeb7674b4
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6568
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-10 08:19:44 +02:00
Patrick Georgi f17c58b415 cpu/intel/model_1067x: avoid null-pointer dereference
Change-Id: I7467d4a947e9e447707e1370b7e639ddddc20d3d
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6570
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-10 08:19:24 +02:00
Patrick Georgi 77c9508f58 intel/fsp_bd82x6x: Fix cycle error some more
As a follow up to #6479 (63e1948643),
fix the remaining faulty loop.

Change-Id: I2c77efe620c71e939f4d74e48f90a166c782e5f5
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6569
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-10 05:28:48 +02:00
Patrick Georgi e887ca5a74 cbfstool: fix option parsing
"cbfstool create -B bootblock -s size" (in this order)
would break bootblock selection.

Change-Id: I9a9f5660827c8bf60dae81b519c6f026f3aaa0f3
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6564
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2014-08-09 19:54:09 +02:00
Edward O'Callaghan a0a019698d cpu/amd/geode_lx: Trivial - remove useless comment
Change-Id: I4b04f84fb2be7da4b7ffab71bb2c41142f455440
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6567
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2014-08-09 18:32:11 +02:00
Vladimir Serbinenko 1882527399 ivybridge: Don't propose to include systemagent on native boards.
Change-Id: Ib70a6741b55609840b6fd2fca16bcf9883bf143c
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6566
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2014-08-09 18:19:53 +02:00
Vladimir Serbinenko 8a57b39223 lenovo/x201: Enable wake on LID and Fn key.
Change-Id: I485da5b8e9084c73f16b5df1c42879697fc0ac3d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6528
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-09 18:18:41 +02:00
Edward O'Callaghan 309a7ffc66 southbridge/amd/cs5536: Trivial style fix for trailing comment
Change-Id: Ia3a846497c220866e950a4b0bb53cb05c0e0cee2
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6557
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-09 18:06:17 +02:00
Edward O'Callaghan cd2c1245f0 cpu/amd/geode_lx: Reduce fancy ASCII art with embedded comments
Lets try not to play games with the Lexer with fancy ASCII art. Doxygen
has a more well defined and useful syntax for annotations.

Change-Id: I6f6c58971f509064ae1e28a1740e50e2ae721513
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6550
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-09 18:06:09 +02:00
Edward O'Callaghan 728ff392e7 cpu/amd/geode_lx/cache_as_ram.inc: Trivial - Fix indent with tabs
Change-Id: Ic65f8d2cbb5bc459cf513c6b34a5f1846cb2b897
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6549
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-09 18:04:32 +02:00
Stefan Reinauer ff0df2bba5 Exynos5420: clean up SPI driver
That extra struct is not needed, we already defined it earlier on.
Also fix coding style in the file.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I586d290f2f3ba2f44aca7fdee400b88547465599
Reviewed-on: https://chromium-review.googlesource.com/169780
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit f7df9f05fb707cac7976cd8a0b36bcf30cef8e0f)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6532
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-09 17:36:40 +02:00
Vadim Bendebury 2f6b0a9a4b Set check-lxdialog.sh mode properly
This script is used by 'make menuconfig', but being non executable it
fails to run, causing the make invocation failure.

Setting 'x' mode bits fixes the problem.

Change-Id: I925ca4ee056937b6c38ad34f5520fd621f9d9eb0
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173564
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit 3ddb9d221ecc3df968853d765b566cf0648a7525)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6540
Tested-by: build bot (Jenkins)
2014-08-09 17:30:33 +02:00
Daniele Forsi 6ed2a242ee intel/eagleheights/Kconfig: Do not set twice MMCONF_BASE_ADDRESS
Remove the lines added in an apparently unrelated commit 53ad9f58 (Make CONFIG_HAVE_HIGH_TABLES consistent in where and how it is set.)
which touched the symbol HAVE_HIGH_TABLES in all files except this one and
keep those added the same day in commit 6842c029 (Remove MAINBOARD_OPTIONS, which is a relic from early kconfig development.)

Change-Id: Ib055c25a0a0795a50a36e65218c8f31e921f1502
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6417
Tested-by: build bot (Jenkins)
Reviewed-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-09 17:29:44 +02:00
Edward O'Callaghan 4e9f5e3f36 superio/smsc/sio1036: Clean up RAMstage superio.c component
Remove spurious includes, unused variables and some wasted new lines.
Re-organise things to be consistent with other superio's.

Change-Id: I959bab2f7a83a1b9160d7f010a0de9638b30cf07
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6465
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-08-09 10:06:13 +02:00
Duncan Laurie c14e961f23 falco: Remove RTD2132 chip and setup from devicetree
This disables the spread spectrum clock and avoids errata.

Old-Change-Id: I04eb767f1587bb64a215a92b66cd05e099d29964
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66673
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit a7bf0d818c431221f4d014e3a0130bec8db7406e)

falco: Remove RTD2132 driver from kconfig

Original-Change-Id: I89ad9fbfbc58878602ed85ada918524426b5bc77
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66946
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 1d732eb5e4743546b8ed50c8c44965a687f61ab2)

Conflicts:
	src/mainboard/google/falco/Kconfig

Old-Change-Id: I317a0741779e272ad72b7272ef6f4a67abd66698
Reviewed-on: https://chromium-review.googlesource.com/167311
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit ffa6c89fbac04b4b6fceafd4ba97d39a285c4aa3)

Squashed two commits and corrected the subject line from 2312
to 2132.

Change-Id: If4f1e59999b70efe2de45522ba78051d9ed88dd7
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6527
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-08 20:00:08 +02:00
Furquan Shaikh 45f868d34f Falco/Slippy: remove unwanted scratchpad writes
Register range 0x4f000 - 0x4f08f includes scratchpad registers. Fastboot
works fine with these registers removed and graphics is initialized properly

Change-Id: Ic57c526a90619f4a073690440f6c5ac6ca96bf10
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65755
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 7e7befdc3956cbc28d346545669cb55c566cf3ea)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6525
Tested-by: build bot (Jenkins)
2014-08-08 19:50:28 +02:00
Stefan Reinauer 42b1c34f7b ARMv7: Add stdint types needed for vboot library
Change-Id: I778ea787b20a7d7d7b202b1b5e7f956d2fde6629
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/169621
(cherry picked from commit 499a4802b5ad070a0b82f3b291073aa05fa7946e)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6523
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-08 19:49:02 +02:00