I guess it was dropped because its concept was misunderstood. The idea
is to always have it set to `Yes` in the cmos.default. Users can then
ack the loading of the defaults by setting it to `No`. If the defaults
ever get loaded again, they'll be notified by the default `Yes`.
Change-Id: I1aa6d75bd5aa153c7b11a6b74564272eaa7cc523
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17355
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector
code) the reboot counter stored in `reboot_bits` isn't reset on a reboot
with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR
enabled, later stages (e.g. payload, OS) have to clear the counter too,
when they want to switch to normal boot. So change the bits to (h)ex
instead of (r)eserved.
To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also
remove all occurences of the obsolete `last_boot` bit that have sneaked
in again since 24391321 (mainboard: Remove last_boot NVRAM option).
Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/16157
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Run the command below to format the files `irq_tables.c` of (mostly AMD)
mainboards correctly with GNU indent 2.2.10.
```
$ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l
```
Fix up the following two checkpatch.pl errors manually.
```
ERROR: that open brace { should be on the previous line
#1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129:
+ uint8_t reg[8] =
+ { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 };
ERROR: that open brace { should be on the previous line
#1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131:
+ uint8_t irq[8] =
+ { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 };
```
This is needed, so that follow-up commits, fixing checkpatch.pl errors
and warnings, won’t run into conflicts with the git commit hooks, when
for example, spaces instead of tabs are used for indentation.
Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/15932
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Almost all of the places where we have the degree symbol '°', it's
encoded as 0xc2 0xb0 (utf-8 encoding). There are a few places where it
is encoded as just a high ascii byte: 0xb0. Editors that support the
high ascii 0xb0 seem to support the utf-8 0xc2 0xb0 encoding as well,
but the opposite does not seem to be true.
Change the high-ascii degree symbols to utf-8 encoding.
Change-Id: I3d06289b802f45e938dc72b4c437fca56235b62b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15978
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
The SB600 code had the base address of the HPET hardcoded throughout.
It looks like the plan was to have it be updated in ACPI if needed,
but this wasn't ever implemented. The variable names being used to
do this update were the same, causing an IASL warning. Because of
this, the operation to update the HPET address actually did nothing.
This was fine, because it didn't actually need to be updated.
- Replace all that code with a #define.
- Add and update some comments in the same area.
Fixes IASL warning:
dsdt.aml 1505: Store(HPBA, HPBA)
Warning 3023 - ^ Duplicate value in list (Source is the
same as Target)
Change-Id: I9ba5fe226a4a464e0045ce7d3406898760df5e5a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12705
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
The newer versions of IASL are unhappy when an operator
has the same object as both source and destination.
The warning can be completely disabled with a command
line argument, but in general, I'd really rather not
just disable warnings.
The bits in this register are write 1 to clear, so reading and
writing the same register is what we want to do. Instead, store
it in a temporary register then write it in a second operation.
Fixes warning:
dsdt.aml 1396: Store(PWST, PWST)
Warning 3023 - ^ Duplicate value in list
(Source is the same as Target)
Change-Id: I52d73d4431db237be83016d67cd397f31b53d9c6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12691
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
According to the ACPI Spec for CondRefOf, the result argument is
optional. In all of these locations, it was getting set but not
used, creating a warning in new versions of IASL. Since it's
an optional argument, just remove it.
dsdt.aml 22: if(CondRefOf(\_OSI,Local1))
Warning 3144 - ^
Method Local is set but never used (Local1)
Change-Id: I07f49ac5a3708838d1c4a7216dfb11acc415c881
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12692
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The obsolete and removed getpir utility remarked in its output that the
data is autogenerated. The tool was removed because it wasn't very
reliable, so there's no need to point that anymore.
Change-Id: I5d624931ba7872b1fefa8fa3c270ae7367e069fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12354
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The last_boot NVRAM option was deprecated and removed in
commit 3bfd7cc6. Remove the last_boot option from all
affected mainboards to eliminate user confusion.
Change-Id: I7e201b9cf21dfe5dda156785bad078524098626d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12316
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Replace the AMD SMBus section with the equivalent SB800 smbus.asl
include or remove already commented-out sections.
Verified by running the cpp preprocessor over the DSDTs and diffing the
results against this patch.
The only change is in src/mainboard/siemens/sitemp_g1p1/dsdt.asl, where
someone added RADD and SADD to the OpRegion, but those are unused, so
removing them is fine.
Change-Id: I074c8a1ed1c9a944d4988752bd0fc42c199c766c
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/10618
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;
Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
`device_t device` is missing as argument. Every device_op function
should have a `device_t device` argument.
Change-Id: I3fc8e0339fa46fe92cc39f7afa896ffd38c26c8d
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/9597
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
If SB_HT_CHAIN_ON_BUS0 is selected, HyperTransport chain for System Bus
is the first to scan and it will be assigned with bus number 0.
If HT_CHAIN_DISTRIBUTE is selected, each link will reserve a fixed range
of bus numbers instead of assigning consecutive numbers across all the links.
All fam10 have SB_HT_CHAIN_ON_BUS0 selected under northbridge.
Follow-up can easily drop this if we find this is dictated by architecture.
Change-Id: I8deddcb4c3fd679b6b27e2879d9dba3895c4dd6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8366
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
This change switches all mainboard vendors and mainboards
to be autoincluded by Kconfig, rather than having to be mentioned
explicitly.
This means, vendor and mainboard directories are becoming more
"drop in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.
The long term plan is to enable out of tree mainboards / components
to be built with a given coreboot version (given that the API did
not change)
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: Ib68ce1478a2e12562aeac6297128a21eb174d58a
Reviewed-on: http://review.coreboot.org/9295
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
The existing code generated invalid ACPI processor objects
if the core number was greater than 9. The first invalid
object instance was autocorrected by Linux, but subsequent
instances conflicted with each other, leading to a failure
to boot if more than 10 CPU cores were installed.
The modified code will function with up to 99 cores.
Change-Id: I62dc0eb61ae2e2b7f7dcf30e9c7de09cd901a81c
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8422
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
- Remove @param command for #define - this isn't valid.
- Rename duplicate @section names - All of the renamed @sections
have other @section names in the same file.
- Remove blank @brief and @param commands - Doxygen seems to REALLY
dislike this...
- Add a missing @param name.
Change-Id: Iba99ec68b37bbb5c375b7256363d16228031d771
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8175
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Use 'delay.h' header rather than directly including 'delay.c'
source. N.B. Some amdfam10 and K8 boards are not included in
this changeset since unrelated issues are woven in there.
Change-Id: Ibc0c0e560d8eedaf5c3150f95ba72fe5dd8d6f3a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8086
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Fix system include paths to be consistent. Chipset support is
part of the Coreboot 'system' and hence 'non-local' (i.e., in
the same directory or context). One possible product of this, is
to perhaps allow future work to do pre-compiled headers (PCH) on
the buildbot for faster build times. However, this currently just
makes mainboard's consistent.
Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8085
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Clang warns of an implicit conversion from 'double' to 'int'
e.g. changes value from '26.67' to '26'. Thus take the floor() of
the array and not change orginal behaviour.
Change-Id: Ifcc7bbfe8d627451b82053f53a885f315e2550ec
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7725
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
The simo board with console output at UART port 1 (COM2) will not produce
any output if CONFIG_UART_FOR_CONSOLE=1 is set correctly.
Commit f29200240e
(superio/ite/*: Factor out generic romstage component)
will only and always activate UART port 0 unregarded to
CONFIG_UART_FOR_CONSOLE value.
Now the UART port which was selected by CONFIG_UART_FOR_CONSOLE
will be enabled and used for console output
Change-Id: Ibbd2b5115b1ed4763962ba32fc9c19431a906c78
Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Reviewed-on: http://review.coreboot.org/7060
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Convert mainboard's that use model specific romstage functions of
it8712f to the generic framework by following the reasoning of:
a7d14a1 ite/common: Introduce common watchdog and 3.3V VSB helpers
Change-Id: I1485306a951103c9a4bc0dbe87c416c91f46c36f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5737
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
