Greg Watson
5bed979a9b
added post-pci pass
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:38:02 +00:00
Greg Watson
6430c011f4
get CONFIGURE right
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:51:01 +00:00
Greg Watson
2910a2b545
static devices
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:20:17 +00:00
Greg Watson
de085393ed
*** empty log message ***
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 18:14:20 +00:00
Eric Biederman
860ad373ef
- First pass at code for generic link width and size determination
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 23:30:29 +00:00
Eric Biederman
2c018fba95
- First pass at s2880 support.
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- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
Greg Watson
1b0e79704f
new chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 15:12:38 +00:00
Greg Watson
8275bad6f6
more chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 04:20:08 +00:00
Greg Watson
d0580343b6
chip stuff
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-20 23:28:01 +00:00
Eric Biederman
9b4336cf41
- Major cleanup of the bootpath
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- Changes to allow more code to be compiled both ways
- Working SMP support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19 04:28:22 +00:00
Eric Biederman
4086d16ba2
- Implement an enable method for pci devices.
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- Add initial support for the amd8131
- Update the mptable to something possible
- hdama/Config add the amd8131 southbridge
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:26:03 +00:00
Eric Biederman
655bf44cde
- Remove all of the annoying $Id strings
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 02:15:12 +00:00
Ronald G. Minnich
a3c708b5d2
static configuration. Needs new keyword per greg to enable inclusion of a
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part-specific struct into the tree.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-11 14:51:29 +00:00
Eric Biederman
7a5416af95
- Modify the freebios tree so the pci config space api is mostly in sync between
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code that runs without ram and code that runs with ram.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 19:23:51 +00:00
Eric Biederman
a05b6ddb15
- Add pci_def.h so romcc compiled files can also get at the
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pci definitions
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-21 16:14:51 +00:00
Eric Biederman
526855741b
- Cleanups on the romcc side including a pci interface that uses
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fewer registers, and is easier to hardcode.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19 19:16:21 +00:00
Ronald G. Minnich
49cf5967ce
descriptor for chips
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-16 23:33:13 +00:00
Eric Biederman
5899fd82aa
- Small step forward Linux boots and almost works...
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 06:25:08 +00:00