Update the vboot board list for the 4.22 release.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I77c5ca2c2c36d8b1ddadad4f15d2d4148ff0b325
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
The community preview branch for coreboot on latest Xeon Scalable
processor is opensource at:
https://review.coreboot.org/plugins/gitiles/intel-dev-pub/.
Change-Id: Ie2ffc1722a4a26d6039b6642efa95bf072d896ad
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Nitrokey offers various products, which have coreboot pre-installed.
Change-Id: I3ef25e0e1cb97eda5fd457bdb650f3ee3f00210a
Signed-off-by: Markus Meissner <coder@safemailbox.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78299
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Intel published a technical paper about coreboot on Eagle Stream.
The document number is 778593.
Signed-off-by: David Hendricks <ddaveh@amazon.com>
Change-Id: Ic67f9a69b7e2ea526c3c5a604e38bb939c72feec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78117
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Change-Id: I462d0bd3e9f3b425631987fa793d29323c3f9d61
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Change-Id: If7081897d8232e3ac84de0fa76689ad05808996d
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
The options in conf.py for the following build targets are either
commented out or contain example values, which suggests that there was
no interest in them recently. Their comments also seem more like
generated examples.
* LaTeX
* man pages
* Texinfo
In order to clean up our configs and scripts for the documentation,
remove the configuration options from conf.py for these build targets.
Also, remove the build targets responsible for generating a PDF file
from Makefile. Don't touch Makefile.sphinx for now though as we usually
wrap around it.
We may bring these build targets back if there is real interest in
them, but it seems only the HTML target was really used.
Change-Id: I7df8ea886f94d9b25e8eeb0ccbc2a7392b96a575
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77439
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This board is similar to x11ssm-f but has a proprietary form factor with
NVMe and a single x16 slot (potentially bifurcated to 2x x8) and a x4
slot.
Change-Id: I53a0b6012ae64cf1ba4b625f11aaf771637307f3
Signed-off-by: Kieran Kunhya <kieran@kunhya.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Some of our documentation still points to the wrong branches
Change-Id: Idb72e4f44f294f64eb01c588027d300a53d6fb41
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77875
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Use all available cores to speed up building the documentation.
As $(SPHINXOPTS) has no default in `Makefile.sphinx`, we can
communicate it to all sub-makes via `export`.
Change-Id: I25996f17348505722f3489a15a975de620331b5a
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-reviewed-on: https://review.coreboot.org/c/coreboot/+/77363
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
The rule being added to the refactoring section is already present
in the "coding style" section of the guide, but is currently easy
to miss. Adding it to its own section makes it a little more plain
and makes it more strongly worded.
Update a couple of other areas:
- Make kernel specific phrasing better aligned with coreboot.
- Remove duplicate "try to match" phrase in coding style section.
- Remove section on Data structures - it doesn't apply to coreboot.
- Update text to make it clearer and more coreboot-centric.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic3508529f639ea0609d2ea2032cc52407e9543e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71067
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
- Change all links to wikipedia to https.
- Update some links to wikipedia that were incomplete.
- Update a few links that are now broken.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: If780e15997c499d1df975b436fd9af530f324eba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77488
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Both mainboards have the same documentation. Instead of having two list
items referring to the same document, just merge the two items.
This fixes the following Sphinx warning:
WARNING: duplicated entry found in toctree: mainboard/lenovo/w530
Change-Id: I4140b34db01b1d5f47a39b9c1e33405e7789de63
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77503
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The document for northbridge/intel/i440bx doesn't exist and it didn't
exist at the time of introduction of these two mainboard documents. So
replace the reference with just the northbridge name.
This fixes the following Sphinx warning:
WARNING: unknown document: '../../northbridge/intel/i440bx/index'
Change-Id: Iaa67399f9d0e62d5d54ae08f5ebb8c70073c601f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Add new documentation generated by util/util_readme/util_readme.sh.
This also fixes the following Sphinx warning:
util/abuild/index.md: WARNING: document isn't included in any toctree
Change-Id: I26c33af3c5a5853f6bcce23e982a6b192b01f1d7
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77441
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Sections may not start with transitions. Remove them.
This fixes the following Sphinx error:
ERROR: Document or section may not begin with a transition.
Change-Id: I519af83df14e44b0709dee7e338dba1ee6413f0a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77440
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Tweak a few sentences noticed when reading this.
BUG=none
BRANCH=none
TEST=none
Change-Id: I0a072c83402bc551a6bbdb7cd7c55fc3505784b2
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77464
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Tested-by: Patrick Georgi <patrick@coreboot.org>
This is a useful feature, so add a note about it.
Change-Id: If29f6480f878bdaf877dc208cc4861b884e10840
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77465
Tested-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
- Internal flashing possible
- Fix link
- Link here from the list of mainboards
- More consistent naming
Change-Id: Iaf6448c1e9f0dae9480fa9785a12f09d42f8cf7d
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77377
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
When using the Windows fast startup mechanism which is enabled by
default, Windows will use a cached version of the ACPI tables during
normal boots after a clean shutdown. Since I've run into this issue and
spent quite a bit of time debugging the wrong issue due to this, better
document this possibly unexpected behavior.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia9e65f6a3aff13fa54abe68c8f5fcbf9bc6efc1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The indentation resulted in the following error:
…/Documentation/soc/amd/psp_integration.md:22: ERROR: Unexpected indentation.
Alas, the line number refers to the embedded rst.
Change-Id: I9526d023af5207602c4a4cea7704b547ef1b7bf0
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Newer versions of Sphinx complain about the language being set to None,
so explicitly set it to 'en'. The syntax that is currently used to
enable custom CSS styling for tables [1] also no longer works, resulting
in the docs rendering without CSS. Fix this using the html_css_files
option instead.
TEST: The documentation builds and renders correctly with both Sphinx
1.8.3 in from the doc.coreboot.org Docker container and Sphinx 7.2.2
from distro packages.
[1] Commit a78e66e5f4: Documentation: Add static CSS file to fix tables
Change-Id: I036b1cad3cfa533c0c3a037bac649caa2d968d4b
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75466
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Based on contents from coreboot wiki[1], this patch adds much needed
documentation for the very important abuild utility.
On top of what was there:
- Mainboard targets have been updated
- Added example for building one variant of one board
- Added example for building boards selectively and/or with custom
configurations using --skip_set/--skip_unset, -K, and config files
[1] https://www.coreboot.org/Abuild
Change-Id: I69701eaeef616828bc30736aba2f617e844a3148
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_vs`:
* Windows 11
* Ubuntu 22.04
* Manjaro 22
No known issues.
https://starlabs.systems/pages/starbook-specification
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I7c92bf92ab4de546c3633fae7e19a302409508ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Channel portalling has been disabled for the matrix.org-libera.chat
bridge[1]. Hence, we created a new Matrix channel #coreboot:matrix.org
(that is plumbed to the IRC channel).
[1] https://libera.chat/news/matrix-deportalling
Change-Id: I896bfed71790988503dc8229fe9b34e175046dbf
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76864
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Threatening or initiating legal action against the maintainers of our
infrastructure or projects (all projects hosted on our infrastructure)
is a huge stressor to those maintainers.
To underline that severity, such threats or action will lead to an
immediate ban from our infrastructure as agreed on the leadership
meeting of 2023-05-31.
There may be legitimate legal action to take in certain cases, and
it's always possible to unban people, but given the severity provide
warning that we'll opt for a "ban first, sort out later" approach.
Change-Id: Ifa865487dc81ed3797fe60e5cef737c57dd85fea
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75554
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Most of the components of this laptop are tested to work,
which is listed in the documentation.
Change-Id: Id8b3b7f735460c5e76a2dc9ab2d10154e6606ad6
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46630
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
The commit 4d8da8ed ("Docs: Update sphinx targets with the build directory")
introduces an additional variable intending to allow an user to specify
a different build directory. Since the variable is not writable from the
outside and also the Docker container used to build doc.coreboot.org
calls the Makefile with `BUILDDIR` instead of `SPHINXDIR`, building the
documentation within the container doesn't work anymore.
Thus, change the variable name to `BUILDDIR` and make it writable.
Steps to reproduce:
cd util/docker
make doc.coreboot.org
make docker-build-docs
Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
New port based on autoport.
Autoport worked with minor tweaks, but fan speeds went almost
immediately to the maximum. They are controlled by the NPCD379
Super I/O which isn't supported by coreboot.
But coreboot already has code for NPCD378,
which HP Compaq 8200 SFF makes use of.
So SuperIO configuration was copied from the 8200 SFF port.
It seems to work without any issues in "normal" use.
Most importantly, fan speed control seems to work correctly.
However this means that some of the SuperIO LDNs may be configured
incorrectly. See the comments on Gerrit for more information.
The following is tested and is working:
* Native raminit with both DIMMs
* Libgfxinit textmode and framebuffer on both DisplayPorts and VGA
* External USB2 and USB3 ports: they all work
* USB 3.0 SuperSpeed on Linux-libre (rear, 4 ports)
* Ethernet
* Mini-PCIe WLAN
* SATA: 2.5" SSD and optical drive bay
* Booting Live Linuxes from DVD and USB with SeaBIOS 1.16.1
* GRUB (with Libreboot config)
* PS/2 keyboard and mouse
* S3 suspend and resume, wake using USB keyboard
* Headphone output, line out, internal speaker
* Wake on LAN
* Rebooting
* CMOS options & nvramcui
Untested:
* mSATA slot. The SATA port needs to be enabled on devicetree
too, but I'm unable to test due to lack of hardware
* Line in, mic input
* MXM graphics card
* EHCI debug
Not working:
* Mini-PCIe USB: I couldn't get it working on vendor BIOS either, so
maybe it just isn't present
* PS/2 keyboard wake from S3
Change-Id: I2dc31778c2aa1987d5acdf355973a203dd0bb3a3
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74906
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Martin Roth