You have to convert the VSA bios image to ELF using the following
commands (assuming i386/32bit binutils, if in doubt, use crossgcc's
i386-elf-* tools):
objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o
ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf
Then, after build, use
cbfstool coreboot.rom add-stage vsa.elf vsa l
to add it to the image.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
fully). Also fix the kconfig build for HAVE_ACPI_RESUME.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- drop some unused options from "newconfig"
- filter some Kconfig only options from the report
- drop targets directory of a non existent mainboard.
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
the build system yet, so some additional steps are necessary.
It's not that bad, given that the code didn't work before.
You have to convert the VSA bios image to ELF using the following
commands (assuming i386/32bit binutils, if in doubt, use crossgcc's
i386-elf-* tools):
objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o
ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf
Then, after build, use
cbfstool coreboot.rom add-stage vsa.elf vsa l
to add it to the image.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
images due to the "helpful" 4GB rollover behaviour of ld(1).
Back out r4961, something like this should go in eventually, but more
completely tested and working.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
440lx using the 440bx code as a template.
Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative)
where necessary (if romstraps get in the way).
For Kconfig, the special case is set per southbridge (as these define the necessity for this
workaround), for newconfig it's added to each single board.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
automatically.
Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Usually, this means adding values to Kconfig, but in a few cases, adding values
to newconfig, too (which doesn't hurt).
Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still
build.
Trivial and stupid kconfig changes, just lots of them.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
I forgot to svn add the speaker.c and speaker.h.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Change EARLY_STAGE into __PRE_RAM__.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* use relative paths in ldscript.ld and crt0_includes.h
* avoid use of dd(1) in xcompile
* build libregex for kconfig, if necessary
* work around missing utsname on win32
* unlink targets before rename on win32
* implement (crude) mkstemp for win32
* avoid open/read/close, use fopen/fread/fclose instead
* don't free certain data structures in romcc on win32 to
avoid crashes (likely use-after-free())
* handle "\CRLF" and win32 style absolute paths (X:/ or X:\)
in romcc
* make lzma (part of cbfstool) build on XP
* implement ntohl/htonl on win32
* handle CRLF in awk script
* set larger stack for romcc on win32
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This patch is from socket_F_1207, even though the fam10
can not be "make menuconfig"ed currently.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
by ROM_IMAGE_SIZE (so ROM_IMAGE_SIZE + ROMBASE - 4GB == 0),
but that's for another patch.
Should fix the issues created by the bootblock cleanup patch.
Build tested on kontron/986lcd-m, trivial change.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Remove all remaining warnings from qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
it. Trust the option_table generator to get the length correct.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- don't pretend to create a bootblock as large
as the ROM in Kconfig (it's 64k at most)
- don't pretend to accept a bootblocksize value
in cbfstool create (it ignored it)
- patch up the build systems to keep it working
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
looks like unmapped memory, point to the wiki page with
more information.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* fix some comments
* Simplify ACPI wakeup code and make it work without a memory hole
* Add resume entries to global GDT so we don't need our own for resume.
* add ECDT description to acpi.h for anyone who might need it ;-)
* remove rather stupid math to get the right number of MAX_ACPI_TABLES
and just define a reasonable maximum for now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Robert Millan <rmh.grub@aybabtu.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Libra Li <libra.li@technexion.com>
Added object reference to Config.lb, too and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Since we have CBFS setting rom_address in board files is no longer
necessary.
Also, drop vga_rom_address from RS690 completely, it was never used
in the code.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them."
__PRE_RAM__ means "Use simpler versions of functions, and no device tree."
There are probably some places where both are tested, but only one is needed.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Ported from Ron's code in v3.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
is generated in the F segment. Clear the memory before generating an
RSDP to fix the problem.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This function is not called right now,... Please step in and fix up your code,
folks.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
"beginning" or "end". In the beginning case, a new segment is inserted
before the current one. But the ptr will move forward and doesn't
seem to have any other chance to process the "new" segment.
ptr ---------+ move --->
|
V
+--------+ +--------+
| | | |
| new | <---> |current | <---> .....
| | | |
+--------+ +--------+
Now we change the ptr to the previous one and restart the loop. The
new and current segment will both be processed. Even if the current
segment is done twice, no new segment will come up and ptr will move
forward as we expect.
+----------------ptr move --->
|
V
+--------+ +--------+ +--------+
| | | | | |
| prev | <---> | new | <---> |current | <---> .....
| | | | | |
+--------+ +--------+ +--------+
It is tested and fixes the crashing on my AMD Family 10 board.
Some trailing whitespaces were deleted.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
decide whether the option ROM is a special VGA type.
An S3 card that I've got has the wrong class in the VGA BIOS.
(A Stealth 64 DRAM T PCI, from 1994 - BIOS V2.02)
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Atom does not like 36bit MTRRs in CAR setup.
Enable XIP setup again (works with 32bit MTRRs)
Keep code more similar to 6ex code..
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Patrick Georgi