Intel Ice Lake is unmaintained and the only user of this platform ever
was the Intel CRB (Customer Reference Board). As it looks like, it was
never ready for production as only engineering sample CPUIDs are
supported.
As announced in the 4.19 release notes, remove support for Intel
Icelake code and move any maintenance on the 4.19 branch.
This affects the following components and their related code:
* Intel Ice Lake SoC
* Intel Ice Lake CRB mainboard
* Documentation
Change-Id: Ia796d4dc217bbcc3bbd9522809ccff5a46938094
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72008
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Update Delta Lake documentation to add some clarification.
Add a section on how to work on coreboot for the Delta Lake server.
Change-Id: Id756ee0a09cdcd1200752a03e980441db1537ad1
Signed-off-by: Jonzhang Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The Galago Pro 6 (galp6) is an Alder Lake-P board.
Tested with a custom edk2 UefiPayloadPkg.
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots (with NMSO480E82-3200EA00)
- M.2 NVMe SSD (with MZVL2500HCJQ)
- All USB ports
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Backlight controls on Windows 10 and Linux 6.1
- HDMI output
- DisplayPort output over USB-C
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio
- S0ix suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 6.0.6
- Internal flashing with flashrom v1.2-1087-gde016a17
Not working:
- Detection of devices in TBT slot on boot
Change-Id: I8940fb3777d7f18393ef50baec32f9445b375648
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
This AMD reference board is called Pademelon and not Padmelon, so fix
the name in coreboot. Also update the corresponding documentation.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id1c7331f5f3c34dc7ec4bc5a1f5fe3d12d503474
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This board is no longer in the tree.
Change-Id: Ie4a626ce85fe0dc2b2d826dd8830a8e80ec331aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
coreboot uses TianoCore interchangeably with EDK II, and whilst the
meaning is generally clear, it's not the payload it uses. EDK II is
commonly written as edk2.
coreboot builds edk2 directly from the edk2 repository. Whilst it
can build some components from edk2-platforms, the target is still
edk2.
[1] tianocore.org - "Welcome to TianoCore, the community supporting"
[2] tianocore.org - "EDK II is a modern, feature-rich, cross-platform
firmware development environment for the UEFI and UEFI Platform
Initialization (PI) specifications."
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4de125d92ae38ff8dfd0c4c06806c2d2921945ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65820
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
- Move configs for PCIe ports not present on z220_sff_workstation
from the devicetree.cb of base board to the overridetree.cb of
z220_cmt_workstation.
- Add a note for ME/AMT Flash Override jumper, for it is hard to
flash from OEM firmware either internally or externally without
closing this jumper.
- Add a side note for similar HP Compaq Elite 8300 SFF.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I35d8b97f52a83910a61c12b1f7367ee7a19a9ad7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65703
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This fixes the following warnings:
mainboard/starlabs/common/flashing.md::
WARNING: image file not readable:
- mainboard/starlabs/common/fwupdVersion.png
- mainboard/starlabs/common/BiosLock.jpg
- mainboard/starlabs/common/SwitchBranch.png
cbfstool/index.md::
WARNING: document isn't included in any toctree
internals/devicetree_keywords.md::
WARNING: document isn't included in any toctree
mainboard/asus/wifigo_v1.md::
WARNING: document isn't included in any toctree
mainboard/google/index.md::
WARNING: document isn't included in any toctree
mainboard/starlabs/common/flashing.md::
WARNING: document isn't included in any toctree
releases/boards_supported_on_branches.md::
WARNING: document isn't included in any toctree
WARNING: None:any reference target not found:
- releases/coreboot-4.16-relnotes
- releases/coreboot-4.15-relnotes
- releases/coreboot-4.14-relnotes
- releases/coreboot-4.13-relnotes
- releases/coreboot-4.12-relnotes
- releases/coreboot-4.11-relnotes
- releases/coreboot-4.10-relnotes
- releases/coreboot-4.9-relnotes
- releases/coreboot-4.8.1-relnotes
- releases/coreboot-4.7-relnotes
- releases/coreboot-4.6-relnotes
- releases/coreboot-4.5-relnotes
- releases/coreboot-4.4-relnotes
- releases/coreboot-4.3-relnotes
- releases/coreboot-4.2-relnotes
- releases/coreboot-4.1-relnotes
- ../../src/soc/intel/common/block/cse/cse.c
Change-Id: I22273bc1bc34b6297cef4e594c454c2316d4215a
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This change mostly changes links that were identified as broken by
the 'website_scans' jenkins job.
There were some links that seem to be up at times, but that are
identified by link-checker as broken because of SSL issues.
At least one other link was changed to point to archive.org so
that it doesn't break at some point in the future. We should
probably try to make sure that everything is archived there and
point to those versions when possible.
There are still lots more links to do.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I36868ddf6113e18fa6841427dd635c75445b7bef
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
There is no need that the tutorial for flashing firmware has its own
point in the main menu. Thus, move it to the tutorial section.
Change-Id: Ife6d97254af4c006fe01480a78c76303f9cb34bb
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
In preperation for CB:62424, replace HTTP links pointing to the flashing
firmware tutorial with file paths to the Markdown files.
Change-Id: I6a271a912348cbe002bc9cced9922ed743e1133c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
The QEMU POWER9 target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: Ic3b98735840c146cb0bfb122df0e6f762c2beeca
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Fix spelling and use the one from their website qemu.org.
Change-Id: I36a88985ce3a7c59b732c1ca3198d86a591de6bd
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The Supermicro X9SAE target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: I5d3d0b5b935f1a3ea353a3d9e39208db7c7895ef
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Move the instructions for flashing coreboot with fwupd to common
directory as the process is identical across all models and variants.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I293acf962b32c81fdf482e0df15363e1cffa39bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Add an option to build skiboot as a payload. This makes QEMU Power9
board simpler to use as skiboot is necessary anyway.
Change-Id: I0b49ea7464c97cc2ff0d5030629deed549851372
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This adds a new port for the ASRock H77 Pro4-M motherboard. It is
microATX-sized with an LGA1155 socket and four DIMM sockets for DDR3
SDRAM.
The port was initially done with autoport. It is quite similar to the
ASRock B75 Pro3-M which is already supported by coreboot.
Working:
- Sandy Bridge and Ivy Bridge CPUs (tested: i5-2500, Pentium G2120)
- Native RAM initialization with four DIMMs of two different types
- PS/2 combined port (mouse or keyboard)
- Integrated GPU by libgfxinit on all monitor ports (DVI-D, HDMI, D-Sub)
- PCIe graphics in the PEG slot
- All three additional PCIe slots
- All rear and internal USB2 ports
- All rear and internal USB3 ports with reasonable transfer rates
- All six SATA ports from the PCH (two 6 Gb/s, four 3 Gb/s)
- All two SATA ports from the ASM1061 PCIe-to-SATA bridge (6 Gb/s)
- Rear eSATA connector (multiplexed with one ASM1061 port)
- Console output on the serial port of the Super I/O
- SeaBIOS 1.15.0 to boot slackware64
- SeaBIOS 1.15.0 to boot Windows 10 (needs VGA BIOS)
- Internal flashing with flashrom-1.2 (needs `--ifd -i bios --noverify-all`)
- External flashing with flashrom-1.2 and a Raspberry Pi 1
- S3 suspend/resume from either Linux or Windows 10
Not working:
- Booting from the two SATA ports provided by the ASM1061
- Automatic fan control with the NCT6776D Super I/O
Untested:
- VBT (it is included, though)
- Infrared header
Change-Id: Ic2c51bf7babd9dfcbaf69a5019b2a034762052f2
Signed-off-by: Michael Büchler <michael.buechler@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
CPLD can be used for board revision determinition.
Remove info about selecting memory type and add Rev 1.4 info
BUG = N/A
TEST = NA
Change-Id: I4bc851f72ae03e98ab1b2e0e04b07ccf6135ebeb
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Update Delta Lake document following the publish of OCP blog
and the Wiwynn press release.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3eaa765bf9918988b4b5cb01e8607a5c27b9bd17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Update Delta Lake documentation upon:
* Delta Lake and Yosemite-V3 design specs acceptance by OCP.
* Delta Lake OSF acceptance by OCP.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I315db879b75f0df2fbca2fa8bb6d00987a69efba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
https://tech-docs.system76.com/models/lemp10/README.html
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- DIMM slot and onboard RAM
- Both M.2 NVMe SSDs
- MicroSD card reader
- All USB ports
- USB-PD
- Webcam
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- DP over USB-C output
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone/microphone jack
- S0ix suspend*
- Booting to Pop!_OS Linux 21.04 and Windows 10
- Flashing with flashrom
Not working:
- S0ix when a device is attached to the TBT port
Change-Id: I15f7a3b6e9af07fcfde9a71d3f4a84ed625159b7
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
1. The video output now works correctly with Intel IGD (tested with
TianoCore, edk2-stable201903-3392-gf7fe27d686).
2. The kempld EC driver now supports GPIO configuration since
commit 9941e5a5e6 (ec/kontron/kempld: Add minimal GPIO driver).
3. CorebootPayloadPkg is practically dead by now, so delete the comment
about the problem with it.
Change-Id: Ic216c3437b2670638c845ee8964f831b80e18fce
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57461
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Mainboard information can be found in the included documentation.
Change-Id: I9dfc58bb99e14cd9dac2ac53afc0ea11d2252aa9
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
It would be easier for people to find the defined variables.
Change-Id: I6d181f6602aa5d55019ea2110b2d8e1fa7e0159c
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Introduce `USE_EXP_X86_64_SUPPORT` in `src/arch/x86/Kconfig` and guard
it with `HAVE_EXP_X86_64_SUPPORT`. Replace the per-CPU implementations
of the same functionality with the newly-added Kconfig options. Update
documentation and the config file for QEMU accordingly.
Change-Id: I550216fd2a8323342d6b605306b0b95ffd5dcd1c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Felix Singer