Commit Graph

1288 Commits

Author SHA1 Message Date
Julius Werner 1143d08f7e libpayload: head.S: Avoid clearing BSS (and heap) again
3 out of 4 architectures currently zero out the payload BSS in early
assembly code, which is pointless since the code loading the payload has
already done that (with a more efficient memset). ARM64 has never had
any code like this and can run just fine without it. This also defeats
the new optimization of moving the heap out of the BSS, since all three
implementations assume that everything between _edata and _end is BSS.
We should just take this out.

Change-Id: I45cd2dabd94da43ff0f77e990f11c877cee6cda1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16091
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-08-13 02:46:19 +02:00
Julius Werner 55ffccfbae libpayload: cbfs: Fix minor memory leak in some edge cases
cbfs_get_handle() allocates memory for a handle and doesn't free it if
it errors out later, leaving the memory permanently leaked. Fix.

Change-Id: Ide198105ce3ad6237672ff152b4490c768909564
Reported-by: Coverity
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16207
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-12 22:52:22 +02:00
Antonello Dettori 3d609325b9 payloads: add Kconfig option for bayou
Add an option to add bayou as the primary payload.

Change-Id: I8c0164344537b82870198b13ef6fdf20e7d095ef
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15954
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-09 10:44:44 +02:00
Julius Werner e25d3ff9bd libpayload: lzma: Allocate scratchpad on the heap
Allocating a 15980-byte scratchpad on the stack when your default stack
size is set to 16KB is really not a great idea. We're regularly
overflowing into the end of our heap when using LZMA in libpayload, and
just happen not to notice it because the heap rarely gets filled up all
the way. Of course, since we always *have* a heap in libpayload, the
much saner solution is to just use it directly to allocate the
scratchpad rather than accidentally grow backwards into it anyway.

Change-Id: Ibe4f02057a32bd156a126302178fa6fcab637d2c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16089
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-08 19:02:07 +02:00
Julius Werner 41ddd4fcc1 libpayload: arm64: Fix MMU range overlap check
The ARM64 MMU code maintains a list of used ranges, to avoid mapping the
DMA buffer over the coreboot tables and things like that. Unfortunately,
the overlap with ranges in that list is checked with

 (start1 >= start2 && start1 <= end2) || (end1 >= start2 && end1 <= end2)

which is not a full overlap check and misses the case where the second
region is completely contained within the first. This patch replaces
that code with a properly vetted primitive from Stack Overflow.

BRANCH=none
BUG=chrome-os-partner:54416
TEST=Observe how Kevin recovery screen now gets drawn at 10x the speed.

Change-Id: I7e2706426762794e160d743bbfc40da1e26eee12
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16075
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-08 17:35:31 +02:00
Paul Kocialkowski 61486b506d Use VBOOT_SOURCE instead of hardcoding vboot path
This replaces all occurrences of a hardcoded vboot path to the
VBOOT_SOURCE variable, that may be overridden from the command line,
witch fallback to the source from 3rdparty.

Change-Id: Ia57d498d38719cc71e17060b76b0162c4ab363ed
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/15825
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2016-08-08 12:17:00 +02:00
Martin Roth 47ca65a791 payloads/coreinfo: Set KCONFIG_CONFIG value
The KCONFIG_CONFIG value was previously keeping the value set by
coreboot's makefile. That caused it to overwrite coreboot's .config,
making the current coreinfo build and the next coreboot build fail
with the curious error that you were building without the correct
toolchain.

Change-Id: I973b0c36e7227135a5c2d6d261e08889857aaaf1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16023
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-08-03 18:12:06 +02:00
Antonello Dettori aded214e74 libpayload: split "Drivers" config section in Kconfig
Move the configuration of the timer, storage and USB drivers from the
main Kconfig to three separate ones stored in the respective
directories.

This reduces the LOC of Kconfig and makes it more manageable.

Change-Id: I0786dbc1d5d8317c8ccb600f5de9ef4a8243d035
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15914
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-08-02 20:14:36 +02:00
Martin Roth bb9722bd77 Add newlines at the end of all coreboot files
Change-Id: I7930d5cded290f2605d0c92a9c465a3f0c1291a2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15974
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-08-01 21:43:56 +02:00
Patrick Georgi 33ab4fea23 libpayload: fix leak in libcbfs
stage wasn't freed on errors.

Change-Id: I10d2f42f3e484955619addbef2898981f6f90a35
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1347345
Reviewed-on: https://review.coreboot.org/15958
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-07-31 20:01:10 +02:00
Patrick Georgi e8c413318f libpayload: Drop superfluous "continue"
Change-Id: I5a1d1ce8ba268b08d1275f392f0b9e602860c6ab
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1260729
Reviewed-on: https://review.coreboot.org/15957
Tested-by: build bot (Jenkins)
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
2016-07-31 19:17:27 +02:00
Martin Roth 4c72d3612b Remove extra newlines from the end of all coreboot files.
This removes the newlines from all files found by the new
int-015-final-newlines script.

Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15975
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-31 18:19:33 +02:00
Antonello Dettori 783d0c146f bayou: delete pbuilder utility
Delete pbuilder since it is not needed anymore.

Change-Id: I685547e9692944b89521864fc3bee4e9a2f1139f
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15955
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-30 19:34:36 +02:00
Paul Kocialkowski fde3275fb4 Makefile: Include $(top) in DOTCONFIG definition to allow override
Including $(top) in the DOTCONFIG definition allows getting rid of the
$(top) prefix in payloads, which in turns allows providing a full path
for DOTCONFIG via the command line.

Change-Id: I7546a12cf4a2a146e32fef81121f45f83ba67ac8
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/15826
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-28 20:27:42 +02:00
Antonello Dettori 4b1668fd12 coreinfo: Add support to read timestamps
Read timestamps from the last boot sequence and display the information
as if using cbmem -t.

Tested on QEMU with a SeaBIOS payload.

Change-Id: I44f1f6d6e4ef5458aca555c8a7d32cc8aae46502
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15600
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-20 22:09:32 +02:00
Martin Roth e51e1045e4 payloads/iPXE: Fix PXE Kconfig question
As reported by Andrew Engelbrecht on the coreboot mailing list, there
was an issue when selecting the pxe rom file:

When using "make menuconfig", if "add pxe rom" is selected, then
the field below to set to the path of the pxe rom, the "add pxe rom"
option gets disabled.

This problem seems to be due to the use of the 'optional' Kconfig
keyword, so this section of the Kconfig is rewitten here to remove that
keyword and fix the issue.

Change-Id: I51680cb746160cb853c8679ac64e2d37989cb574
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15555
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-12 19:24:03 +02:00
Julius Werner e9808b145f cbgfx: Use memset() for faster screen clearing if possible
cbgfx currently makes a separate function call (recomputing some values)
for every single pixel it draws. While we mostly don't care that much
about display speed, this can become an issue if you're trying to paint
the whole screen white on a lowly-clocked Cortex-A53. As a simple
solution for these extreme cases, we can build a fast path into
clear_screen() that just memset()s the whole framebuffer if the color
and pixel format allow it.

BUG=chrome-os-partner:54416
TEST=Screen drawing speed on Kevin visibly improves (from 2.5s to 3ms).

Change-Id: I22f032afbb86b96fa5a0cbbdce8526a905c67b58
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15524
Tested-by: build bot (Jenkins)
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-02 03:22:51 +02:00
Martin Roth 9d8b2ffb49 nvramcui: Update Makefile
- Add all, clean and distclean to .PHONY
- Rebuild nvramcui.elf when the makefile changes.
- Update libpayload target to $(LIBPAYLOAD_DIR) target - these are the
same thing, but by using the variable it makes it more obvious.
- Remove .config.old as well as .config when running distclean.
- Add CFLAGS to the LPGCC command line:
-- Enable all warnings, set warnings as errors.
-- Optimize for size
-- Enable '-ffreestanding -nostdinc -nostdlib' to keep from building in
system functions and to fix the warning:
libpayload.h: warning: conflicting types for built-in function 'log2'
static inline int log2(u32 x) { return sizeof(x) * 8 - clz(x) - 1; }

Change-Id: Icc6c70b259cd7c22dc960cdb732927f9c0c93ee8
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14482
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-06-29 19:12:57 +02:00
Antonello Dettori 4f7d329caa tint: Fix tint and add Kconfig option
Fix the compiler errors with tint, improves the Makefile,
adds Kconfig integration and secondary payload option.

Change-Id: Ia99e30f566d5ccf0d083e52bf174970535daefc5
Signed-off-by: Antonello Dettori <dettori.an@gmail.com>
Reviewed-on: https://review.coreboot.org/14989
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-28 18:29:48 +02:00
Furquan Shaikh 49f7dd9982 libpayload/pci: Correct MASK macro names
BUG=chrome-os-partner:54563

Change-Id: I8ef1c595205fe46dd64357051eeb232e2bbbebc1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15270
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-21 20:41:06 +02:00
Benjamin Barenblat 9993286de2 payloads/external/GRUB2: Pass CONFIG_GRUB2_EXTRA_MODULES
Set CONFIG_GRUB2_EXTRA_MODULES from the Kconfig when building GRUB2.
This causes the specified modules to actually enter the built payload.

Change-Id: I345026af705ba8af77c6c12aba8e1bd4135e519c
Signed-off-by: Benjamin Barenblat <bbaren@google.com>
Reviewed-on: https://review.coreboot.org/15203
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2016-06-21 18:42:08 +02:00
Ryan Salsamendi 5b9a253ae9 Update SeaBIOS URL to https
Change-Id: If1c37bf2bb7df35d5e5ec37cefb9bb92a251f93b
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/15206
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Antonello Dettori <dev@dettori.io>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-20 23:50:49 +02:00
Liangfeng Wu 8c7e416309 libpayload: usb: xhci: Support rockchip xHCI controller
1. Make the xHCI driver to support xHCI controller v1.1
2. And a new function xhci_ring_doorbell(), it aims to
   add a memory barrier before ringing the doorbell, to ensure
   all TRB changes are written to memory.

BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB on Kevin rk3399 platform

Change-Id: Ife1070d1265476d0f5b88e2acf3299fc84af5832
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 0c21e92
Original-Change-Id: I4e38e04dc3c7d32ee4bb424a473c70956a3c3ea9
Original-Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/346831
Original-Commit-Ready: Brian Norris <briannorris@chromium.org>
Original-Tested-by: Douglas Anderson <dianders@chromium.org>
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15111
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-06-12 12:09:55 +02:00
Martin Roth bc46ac5c7d SeaBIOS: Add option to include a bootorder file in cbfs
Including the SeaBIOS bootorder file seems to be a fairly common desire,
so let's make it easy.

Change-Id: Ib0874dee46215287b09c0b52648072ef3ff06ec5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15076
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2016-06-08 19:17:04 +02:00
Julius Werner 2c51572435 arm64: Add stack dump to exception handler
Some exceptions (like from calling a NULL function pointer) are easier
to narrow down with a dump of the call stack. Let's take a page out of
ARM32's book and add that feature to ARM64 as well. Also change the
output format to two register columns, to make it easier to fit a whole
exception dump on one screen.

Applying to both coreboot and libpayload and syncing the output format
between both back up.

Change-Id: I19768d13d8fa8adb84f0edda2af12f20508eb2db
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14931
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-24 20:51:28 +02:00
Julius Werner 2296479dfd libpayload: cbfs: Add cbfs_handle API for more fine-grained accesses
The libpayload CBFS APIs are pretty old and clunky, primarily because of
the way the cbfs_media struct may or may not be passed in and may be
initialized inside the API calls in a way that cannot be passed back out
again. Due to this, the only real CBFS access function we have always
reads a whole file with all metadata, and everything else has to build
on top of that. This makes certain tasks like reading just a file
attribute very inefficient on non-memory-mapped platforms (because you
always have to map the whole file).

This patch isn't going to fix the world, but will allow a bit more
flexibility by bolting a new API on top which uses a struct cbfs_handle
to represent a found but not yet read file. A cbfs_handle contains a
copy of the cbfs_media needed to read the file, so it can be kept and
passed around to read individual parts of it after the initial lookup.
The existing (non-media) legacy API is retained for backwards
compatibility, as is cbfs_file_get_contents() (which is most likely what
more recent payloads would have used, and also a good convenience
wrapper for the most simple use case), but they are now implemented on
top of the new API.

TEST=Booted Oak, made sure that firmware screens and software sync
worked okay.

Change-Id: I269f3979e77ae691ee9d4e1ab564eff6d45b7cbe
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14810
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-17 22:48:28 +02:00
Lee Leahy f92a98c56e coreboot_tables: Extend serial port description
Extend the serial port description to include the input clock frequency
and a payload specific value.

Without the input frequency it is impossible for the payload to compute
the baud-rate divisor without making an assumption about the frequency.
This breaks down when the UART is able to support multiple input clock
frequencies.

Add the UART_PCI_ADDR Kconfig value to specify the unique PCI device
being used as the console UART.  Specify this value as zero when the
UART is not on the PCI bus.  Otherwise specify the device using bus,
device and function along with setting the valid bit.

Currently the only payload to consume these new fields is the EDK-II
CorebootPayloadPkg.

Testing on Galileo:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file:
   *  Add "select ADD_FSP_PDAT_FILE"
   *  Add "select ADD_FSP_RAW_BIN"
   *  Add "select ADD_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
   CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
   UEFIPAYLOAD.fd
*  Testing is successful when CorebootPayloadPkg is able to properly
   initialize the serial port without using built-in values.

Change-Id: Id4b4455bbf9583f0d66c315d38c493a81fd852a8
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14609
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-09 17:21:22 +02:00
Varadarajan Narayanan c1ae7e9183 libpayload: ipq40xx: Introduce timer and uart driver
BUG=chrome-os-partner:49249
TEST=None. Initial code not sure if it will even compile
BRANCH=none

Change-Id: Ibf2c91be93e2567cc1262b6fb84461eef51ab3e0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b87157138302b017e64a28417a22421c880c1bcb
Original-Change-Id: I16a8324d3c8ef4ee729f4509fda5bfe703b24ce4
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333304
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14656
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 08:53:24 +02:00
Patrick Georgi 5dc87fe470 libpayload/arm64: Mark existing framebuffer as DMAable
If a framebuffer is already configured by coreboot, libpayload's
MMU tables didn't mark its memory DMAable (unlike when libpayload
set up its own framebuffer memory).

BRANCH=none
BUG=chrome-os-partner:52826
TEST=depthcharge's recovery screen is not corrupted anymore on kevin

Change-Id: I228a861b3fdcf1298a3cfa0a054214c78ed55e70
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 889e8358a0f2f504abd9910549aa68f3992bb4e8
Original-Change-Id: I7ba79151ccc1eb605f82e1869a74b539a6be5e99
Original-Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/341092
Reviewed-on: https://review.coreboot.org/14685
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 08:30:56 +02:00
Varadarajan Narayanan 8e0ffe2088 libpayload: xhci: Set MPS based on speed
BUG=chrome-os-partner:49249
TEST=Compiles and boots and detect USB storage
BRANCH=none

Change-Id: I9007399e1f785e6f1d2258225e3f7cc602053aed
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1db43f53973d2124e41186777caa829aa346ace3
Original-Change-Id: I943d19a3a7d785bd075073b57ba6388662d7df90
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333311
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14659
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 08:29:57 +02:00
Paul Kocialkowski d2ea674635 libpayload: Add nyan config
This adds a nyan libpayload config, that should fit all nyan devices.

Change-Id: I6b86a03054a7625534fd38ee6a21d3b91fb43589
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/14473
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 07:49:57 +02:00
Werner Zeh bc2d151b00 payload: Fix broken Linux kernel as payload
Commit 785a31d67e
(Makefile.inc: Move payload code to payloads/) breaks the usage of
Linux kernel as payload. The reason for it is that cbfs-files-y is
evaluated before payloads/external/Makefile.inc is sourced and as a
consequence ADDITIONAL_PAYLOAD_CONFIG is empty when it is used for
payload options. That leads to missing command line and initrd for
the kernel which in turn leads to kernel panic when it boots.
To avoid it, move the code which adds payload to cbfs completely to
payloads/extranal/Makefile.inc. This way, ADDITIONAL_PAYLOAD_CONFIG is
set right before the payload itself is added to cbfs-files-y.

I have tested this patch with a Linux kernel as well as with SeaBIOS as
payload on mc_tcu3 and it works. If someone sees impact to other
payloads just let me know.

Change-Id: I7aad352f8b3fc1fdba1875b12648b07eba14e282
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/14579
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-04 12:23:57 +02:00
Martin Roth 0cf7acc688 nvramcui: Cast u8 * values to char * to eliminate warnings
error: pointer targets of 'strcmp' differ in signedness
expected 'const char *' but argument is of type
'u8 * {aka unsigned char *}'

Change-Id: Id5cbb6fc2efd7c57abc59b08416047e10461436f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-03 20:00:07 +02:00
Jonathan Neuschäfer f03217b6bb payloads/nvramcui: Make the makefile non-executable
Change-Id: Id584cbf02c9d3ecb89fcf2a3190f0a73816954a8
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14526
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-01 16:28:56 +02:00
Martin Roth 4005d9b2e4 payloads: Add a stable version of Memtest86+ for reproducibility
Memtest86+ was pulling origin/master which will change over time.  This
adds a commit-id as a stable version to allow it to be reproducible.

The other secondary payloads, coreinfo and nvramcui, do not need this
because they are part of the coreboot repo and not fetched from an
external source.

Change-Id: I20c516010f76cf03342bd8883d0ee7ac5f8bc7e4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14520
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-27 19:55:40 +02:00
Martin Roth 4793ec3ea1 Memtest86Plus/Makefile: Update to common payload makefile format
This series of patches attempts to update all of the external payload
makefiles to be as similar as possible.

- Add .git to the git repo URL to show that it's a git repo.
- Use the common checkout, fetch, and clone ($(project dir)) targets
- Add TAG-y and NAME-y variables - just with origin/master for now.
Stable will be added shortly.
- Make sure all phony targets are in .PHONY

Change-Id: If83c100841d5f91a9fab7ac44ba20ec2271c0594
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14152
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-27 19:48:54 +02:00
Martin Roth 698366654c coreinfo: Update Makefile
- Get the absolute pathname for LIBPAYLOAD_PATH
- Update distclean:
--correctly remove .config and .config.old - *.config doesn't match
.config
-- remove obsolete files from cleanup

Change-Id: I6aa51b4ac2b392f786aeb12647be5073e6d02df5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14485
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 20:08:55 +02:00
Martin Roth f62065f15b nvramcui: Reformat nvramcui.c
Change-Id: I89dca25d93a4c94cc51f313397e49ba763948450
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14484
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 20:08:32 +02:00
Martin Roth 9bc6674b7c nvramcui: Remove unnecessary header files
Change-Id: If845729bc34df646a5628ac2a35acc737fd4701d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14483
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 19:58:52 +02:00
Martin Roth 3383a25f91 payloads/Makefile.inc: Add phony targets
Add 'nvramcui' target to make it easier to build and test.
Put both nvramcui & coreinfo targets into .PHONY because they
both exist as directories.

Change-Id: I9cf76785e69f3c8e47fe92f1b1648fd0f7a63c3e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14481
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-25 16:45:26 +02:00
Stef van Os c012428291 libpayload: time: split time.h from libpayload.h
Move time functions and prototypes from libpayload.h to time.h.
In a similar manner to other c libary headers, this change makes
porting existing applications to libpayload easier.

Change-Id: I71e27c6dddde6e77e0e9b4d7be7cd5298e03a648
Signed-off-by: Stef van Os <stef.van.os@prodrive-technologies.com>
Reviewed-on: https://review.coreboot.org/14437
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-21 23:08:52 +02:00
Iru Cai 12b641d3df coreinfo: Build libpayload in coreinfo directory
When building libpayload, make the build directory and .config outside
libpayload source directory so it'll not pollute the libpayload source
and cause conflicts with other builds.

Change-Id: Idcfbc7dbe4d52a3559229d8450c3efaafd33b93b
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14389
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-21 23:06:41 +02:00
Iru Cai 736aa74faf add nvramcui as a secondary payload
Change-Id: Ie38a358ebd2d040ce32b3eeaeb664c568d4dc51e
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14378
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2016-04-20 18:42:52 +02:00
Iru Cai e44b407b00 nvramcui: Update Makefile
* use crossgcc to build nvramcui
* build libpayload dependency

Change-Id: Ife3054aeb03b4da0568ad47f96c633460d6c07ae
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14377
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-20 18:41:37 +02:00
Martin Roth 41f0e0fd4d libpayload: disable EHCI & XHCI in defconfig-mips
drivers/usb/xhci.c and drivers/usb/ehci.c both require arch/barrier.h.

barrier.h is present for x86, arm, and arm64, but not for mips. This
is generating a build error after enabling USB by default on libpayload.

I believe that this slipped through the buiders due to them not getting
cleaned fully.  It was caught in the coverity scan and when setting up
a new build server.

Change-Id: Idd89409a048009c087ce2a787d96a1efd089157f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14391
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-04-18 14:24:21 +02:00
Stefan Reinauer 777028fd8a libpayload: Split off generic serial API from 8250 driver
There is a lot of generic code in the 8250 driver that should
be available for non-8250 systems with serial ports as well.

Change-Id: I67fcb12b5fa99ae0047b3cbf1815043d3919437e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14371
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-16 01:08:23 +02:00
Stefan Reinauer 785a31d67e Makefile.inc: Move payload code to payloads/
Change-Id: I91d9537e8c78560c944c552255e703fc0e6f1f78
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14349
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-04-15 16:25:28 +02:00
Marcel Meißner cb672a5857 libpayload: Enable USB support by default
Most people use USB keyboards.

Change-Id: Ia7cf513059565db7b86190c4aae62d7a35392408
Signed-off-by: Marcel Meißner <mm-meissner@gmx.de>
Reviewed-on: https://review.coreboot.org/7540
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-14 19:48:16 +02:00
Martin Roth 888a98b872 payloads: add iPXE 'payload' build
We already have the ability to add a pxe rom to cbfs, but it needs to be
configured and built separately.

This moves the existing Kconfig options for PXE from device/Kconfig and
the top level Makefile.inc to payloads, and adds the option to download
and build iPXE as part of the coreboot build process.

This configures the serial output of iPXE to match coreboot's serial
port configuration by editing the .h files. iPXE doesn't give any
real build-time method of setting these configuration options.

Change-Id: I3d77b2c6845b7f5f644440f6910c3b4533a0d415
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14085
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-04-13 17:45:37 +02:00
Jonathan Neuschäfer 2bf7a2ca82 coreinfo: Move time to the last line
There are more modules in a category than categories. Moving the clock
down leaves more space for the list of modules.

Change-Id: I536dafe32e1abb1995c8a1942d70e0d90b905612
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14255
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-10 18:13:40 +02:00
Jonathan Neuschäfer a4fbc385e0 libpayload/libc: Fix memset/sizeof usage
Since r is a pointer, memset(r, 0, sizeof(r)) would only zero the first
4 (or 8) bytes of the newly allocated struct align_region_t.

An alternative to this patch would be to use calloc, or introduce a new
zalloc (zeroed allocation; a single-element calloc) and use that.

Change-Id: Ic3e3487ce749eeebf6c4836e62b8a305ad766e7e
Found-by: Coverity (ID 1291160)
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14244
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-04-06 13:33:07 +02:00
huang lin 7b9bca0b2b libpayload: mmu: Initialize the base 4GiB as device memory
This allows to accommodate different platforms' default
configurations, memory configuration is fine tuned later during boot
process.

BUG=chrome-os-partner:51537
BRANCH=none
TEST=none yet, the full stack of patches boots fine on EVB

Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 97a9a71ade4df8a501043f9ae58463a3135e2a4f
Original-Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332384
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/13914
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-04-05 13:34:47 +02:00
Martin Roth 6959f5c915 libpayload: update junit.xml target, clean up output
- Copy each config in configs/ to the junit_config, update each,
in turn, and clean up when done.  This avoids updating the saved
config files and creating dirty files in git.
- Use 'make olddefconfig' instead of 'yes "" | make oldconfig'
- Update clean target to remove junit_config file
- Update distclean target to remove junit.xml

Change-Id: Ib023eb3197f2d8806c73c9c18464157ce3de958f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14164
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-25 18:18:27 +01:00
Martin Roth ae269c0276 payloads: Add a target to print payload git urls and directories
Being able to fetch this list will allow the jenkins builder to securely
fetch the external payloads so we can start testing payload builds.

Change-Id: I777229216b2f11f0f427cd5f8cfa003da4171a77
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14132
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 14:32:02 +01:00
Martin Roth e68a4385d4 payloads/Makefile.inc: Clean up Makefile
- Instead of adding each payload to each common target, create a list
and loop through the list for all of the payloads
- '.phony' doesn't work - the target needs to be uppercase '.PHONY'

Change-Id: I4a7712c94d0f127c2fff8cb8fada4b8132a4ab3b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14131
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 04:03:24 +01:00
Martin Roth c8ed34075b payloads/external: Rename Makefile.inc to Makefile
These makefiles are not included by anything, so they shouldn't be
named Makefile.inc.  Also, having them all be named 'Makefile' makes
some other consolidation work I'm doing much easier.

Change-Id: I1234539ba6a0a6f47d2eb0c21de3da3607c6b8de
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14130
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 04:03:16 +01:00
Stefan Reinauer c2b50ace1b coreinfo: Allow numbers in addition to F keys
When using coreinfo on a serial console (at least
with gtkterm, picocom and minicom on Ubuntu 15.10)
you can't send F keys to the payload. Allow 1..9
for F1..F9

Change-Id: Ie3a11fa1de57c7345737a1ccaff177f407cd5e48
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14065
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-18 21:47:46 +01:00
Stefan Reinauer 94534b3132 libpayload: recreate config files
Add all the default options with:

  for i in configs/*
  do
    cp $i .config
    make savedefconfig
    mv defconfig $i
  done

This also switches to minimal config files instead of the full
configuration files that were previously checked in.

Change-Id: If18a32eca4df9e1dfeb0e212b652d972cea8e4b8
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14077
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-03-16 17:56:32 +01:00
Stefan Reinauer 62af53fe10 coreinfo: Rename libpayload variables
LIBCONFIG_PATH -> LIBPAYLOAD_PATH
LIBPAYLOAD_DIR -> LIBPAYLOAD_OBJ

Change-Id: Idd9947bac594f5b109b877aefac70b1a1d2336eb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14099
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-16 17:55:59 +01:00
Stefan Reinauer 80547369ea coreinfo: Use tinycurses
When using PDcurses over a serial line, the background of
coreinfo is not properly cleared. Hence use tinycurses, which
was the only option when coreinfo was developed.

Change-Id: I15bb6eb552cf924de98d09ef63be33ecf336c526
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14067
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-03-15 21:45:26 +01:00
Stefan Reinauer 9125073d2a payloads: Enable building depthcharge as part of the coreboot build
For CHROMEOS builds, depthcharge can be built automatically.
This dependency exists because depthcharge without vboot and subsequent
signing of the image doesn't work very well, and both are keyed to that
flag as well.

Change-Id: Id0195bd3b4e454f382782106d6512469106daac5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/10924
Tested-by: build bot (Jenkins)
2016-03-15 21:18:22 +01:00
Stefan Reinauer 821844534c libpayload: Move base address, stack and heap size to Kconfig
This will allow more payloads to use the standard linker script
instead of implementing their own.

Change-Id: Ie60120769829f427ceb722109d85859b61dbde31
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14074
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 20:53:38 +01:00
Stefan Reinauer 347a7529aa libpayload: Make comment into help text
Change-Id: I8c8669e73e335e12cb3785cf84b878c305dd5929
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14068
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 20:53:27 +01:00
Stefan Reinauer 805d44f2c7 libpayload: Fix ARM workaround code
_LDFLAGS+="foo" did not work in my shell (bash on Ubuntu 15.10),
so change it to _LDFLAGS="$_LDFLAGS foo". I'm mildly surprised
that this ever worked.

Change-Id: I59c10f34992240c6df2ec7f24aebc6daafb76493
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14076
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:24:41 +01:00
Stefan Reinauer f0acf47ae1 libpayload: Add comment about ARM64 exception stack
Change-Id: I8b74cbf6bdde32c90ad0510e14e899711269e57f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14075
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:24:30 +01:00
Stefan Reinauer 31575f6391 coreinfo: Pretty print RAM addresses
Instead of 500, print 0x00000500 in the ram dump module.

Change-Id: Id250bd99f36dad4088ab88953fb371c400b4231b
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14072
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:23:30 +01:00
Stefan Reinauer 1e6b86b8b6 libpayload: Move MEMMAP_RAM_ONLY to generic options
MEMMAP_RAM_ONLY is not an architecture specific option,
hence move it out of the architecture specific menu.

Change-Id: Iaeef03ed8cbff930a580ad03b1e712087b48714e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14071
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:23:11 +01:00
Stefan Reinauer 8fda04449f libpayload: Drop CONFIG_LP_CHROMEOS
This is adding complexity to the code more than it saves
space, plus some of the tables could potentially be interesting
outside of the ChromeOS context.

Change-Id: I4bf24608f3e26d3b7871a5031ae8f03bc2c8c21f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14070
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:22:58 +01:00
Stefan Reinauer 96d14ac1c9 libpayload: Unify defconfigs
Bring defconfig and defconfig-tinycurses in sync, so that
defconfig and defconfig-tinycurses only differ in the selection
of the curses implementation.

Change-Id: I739c5122b5aaaa2681055c845905721a0b2a11c1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14069
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:22:44 +01:00
Jonathan Neuschäfer d43186418a coreinfo: Remove the LAR module
Since libpayload's LAR support was dropped in If6e36569cd, this module
doesn't compile anymore.

Change-Id: I98f25613a1728e94704d9e9ccb65fd6ba33968b9
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14037
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-13 08:24:49 +01:00
Antonello Dettori 3aa91dc7be payloads/seabios: Add "git revision" to the SeaBIOS version menu
Add an option to specify a git revision from which to build SeaBIOS.

Change-Id: Ifbf3b82e784f79395ab7cd07c5804f72928d7640
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/13937
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins)
2016-03-12 20:23:50 +01:00
Martin Roth 6116f369e9 codebase: Change makefile $(shell pwd) commands to $(CURDIR)
- Change the makefile command $(shell pwd) to $(CURDIR) to find the
current directory without going out to the shell.

Change-Id: I4890eba6129630acd2883b92de77308d39949443
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13967
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:48:06 +01:00
Martin Roth 00e49aed52 coreinfo: Fix libpayload to not install to libpayload/libpayload
Libpayload installs into the libpayload/ directory under the directory
you point it to.  Since we were pointing it to build/libpayload, it
was installing to build/libpayload/libpayload.

Change-Id: I11029fcfb232d9b66eb3f310fa9e663236d4b213
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13966
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:47:43 +01:00
Jonathan Neuschäfer 71d3101259 coreinfo/nvram: Print correct line numbers
With this patch the numbers are the "base" addresses for the lines,
which is consistent with the PCI configuration space view.

Change-Id: I2c70d976f6f9f9f615d13bc7a634d6f8037e0c7b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14028
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-11 18:44:04 +01:00
Jonathan Neuschäfer ff09952921 coreinfo: Default to first non-empty category
... instead of the overall first one.

Change-Id: If9b2674ff2ef83b7c24a3388316b6f4128bc1007
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14027
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:43:22 +01:00
Jonathan Neuschäfer 5368504e44 coreinfo/cbfs: Add some missing file types
An alternative to this patch is to copy the filetypes table from
util/cbfstool/cbfs.h and use that.

Change-Id: Iebf3a7a8912761ff6825a6f51c8b68df0dcc5990
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14026
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:42:29 +01:00
Jonathan Neuschäfer 8a61a2f2d5 coreinfo: Show "No modules selected" when appropriate
Change-Id: I7222544757587b37e0cf632aa01d042414dde223
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14025
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:42:00 +01:00
Jonathan Neuschäfer 1aca8b898d coreinfo/cbfs: Don't assume that the free space is at the end
On emulation/qemu-i440fx, I get this layout:

  Name                           Offset     Type         Size
  cbfs master header             0x0        cbfs header  32
  fallback/romstage              0x80       stage        14284
  fallback/ramstage              0x38c0     stage        42382
  fallback/payload               0xdec0     payload      1165052
  config                         0x12a600   raw          352
  revision                       0x12a7c0   raw          572
  cmos_layout.bin                0x12aa40   cmos_layout  772
  fallback/dsdt.aml              0x12ad80   raw          4000
  img/coreinfo                   0x12bd80   payload      1165052
  (empty)                        0x2484c0   null         1799192
  bootblock                      0x3ff900   bootblock    1456

... which coreinfo displays in the following way, without this patch:

  cbfs master header
  fallback/romstage
  fallback/ramstage
  fallback/payload
  config
  revision
  cmos_layout.bin
  fallback/dsdt.aml
  img/coreinfo

  <free space>


Change-Id: I21eb1dfbe52921843d28683c9396e9b27caa4fbf
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14024
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:41:41 +01:00
Martin Roth 9c3ff1ba52 coreinfo/Makefile: change $(obj) to $(coreinfo_obj)
- Rename obj to coreinfo_obj so it doesn't conflict with the obj
variable in libpayload.

Change-Id: I2ffb06a87e30a5eeff5b0dfc0ba62b5e9ab46e26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13938
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:27:26 +01:00
Martin Roth 143a78c9f8 coreinfo: Remove .xcompile when doing a clean
Change-Id: I3e719e105c4bacd5e02e055d3f00650a1e126656
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13965
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:26:55 +01:00
Martin Roth 342cf7f6a4 payloads/external/Makefile.inc: Don't rebuild SeaBIOS every time
Currently, if SeaBIOS is set as the payload, it gets rebuilt every
single time we do a build.

Change it to re-build just when there’s a config change.

Change-Id: Ib141f2cbf8796d449172432bb30fa4806cf90328
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13948
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-11 18:03:13 +01:00
Martin Roth c3fbda4e73 nvramcui: Add distclean target
This doesn't do anything more than the clean target, but having both
clean and distclean targets in all makefiles makes standardizing the
cleaning routines easier.

Change-Id: I41578de371a8f767ee23266c30e65e928f0985c4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13939
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2016-03-11 17:56:47 +01:00
Martin Roth 3f1abb84e8 SeaBIOS: Update SeaBIOS from repo when using master branch
Previously the SeaBIOS directory would never get updated after the
initial clone because the tag would always match. This can be shown
by noticing that the text 'Fetching new commits from the SeaBIOS
git repo' is never seen.

This change will always try to pull the latest code if 'Master'
is selected.

Change-Id: I460e2fb0c6f683a0f85343d164880c2d9e6d95cc
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13947
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 17:56:05 +01:00
Paul Menzel 468dc33325 payloads/seabios: Update version number in Kconfig
Fix up commit 4f66648c (payloads/seabios: Upgrade stable from 1.9.0 to
1.9.1), forgetting to update the version number displayed in the Kconfig
menu, by updating the string to 1.9.1.

Change-Id: Idb395d0ea65bcf91c7c9645fd76d428936e91587
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/14010
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-03-11 16:54:23 +01:00
Martin Roth 5ad9acaba6 payloads: Move secondary payloads inside of a submenu
To keep the list of 'secondary' payloads from cluttering the payloads
menu, move them into their own menu under the payloads menu.  Then they
don't need any dependencies other than the architecture.

Change-Id: I95119750c6ef627ef0de9b5f5cbad085a51ac2bb
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13941
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-09 17:03:21 +01:00
Martin Roth 679755778b Makefile: Update payload clean targets
Move payload clean targets into payloads/Makefile.inc
Add clean targets for coreinfo, nvramcui, Memtest86+

Change-Id: I70c13582311dfba3e309805053159f8a039cb109
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13940
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-09 17:01:56 +01:00
Paul Menzel 4f66648c09 payloads/seabios: Upgrade stable from 1.9.0 to 1.9.1
SeaBIOS 1.9.1 was released on February 15th, 2016 [1][2] with the changes
below.

```
$ git log --oneline --reverse rel-1.9.0..rel-1.9.1
3403ac4 build: fix typo in buildversion.py
fe4154e xhci: Check for device disconnects during USB2 reset polling
c016236 xhci: Wait for port enable even for USB3 devices
0240428 sdcard: Only enable error_irq_enable for bits defined in SDHCI v1 spec
fe8d986 sdcard: fix typo causing 32bit write to 16bit block_size field
e902d3f nmi: Don't try to switch onto extra stack in NMI handler
dc6498e scsi: Do not call printf() from scsi_is_ready()
6027043 coreboot: Check for unaligned cbfs header
73f00bc fw/pci: do not automatically allocate IO region for PCIe bridges
b3ef39f biostables: Support SMBIOS 2.6+ UUID format
```

[1] http://www.seabios.org/Releases#SeaBIOS_1.9.1
[2] http://seabios.org/pipermail/seabios/2016-February/010493.html

Change-Id: I4bc8224c2a80cbcce54621e941a9c3a92ca04215
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/13933
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-03-09 15:22:56 +01:00
Martin Roth be63a24c4c BuildSystem: Add Memtest86+ as a secondary payload
This allows memtest86+ to be added to CBFS as a 'secondary'
payload on x86 systems, to be loaded by the main payload
if desired.

Selecting this option, which defaults to no, builds the memtest86+
payload and adds it to CBFS as `img/memtest` which can then be
loaded by for example SeaBIOS or GRUB.

Change-Id: Iecf876aaf588ba1df7abdf6668cb26f089bf5f42
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13858
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
2016-03-05 22:57:53 +01:00
Iru Cai 283fd8e653 coreinfo: quote $(AS) and $(CC) in $(LPAS) and $(LPCC)
Without this change it'll get a build error with crossgcc-x64
because $(AS) is "util/crossgcc/xgcc/bin/x86_64-elf-as --32",
and running $(LPAS) (i.e. AS=$(AS) lpas) will run "--32" instead of
"x86_64-elf-as".

Change-Id: I95e5630cb1d4f1ce81a8ca8a7bf338450b325f02
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/13845
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-28 20:09:38 +01:00
Martin Roth 4351ace145 payloads: Load coreinfo as a secondary payload
This allows coreinfo to be added to CBFS as a 'secondary'
payload on x86 systems, to be loaded by the main payload
if desired.

Selecting this option, which defaults to no, builds the coreinfo
payload and adds it to CBFS as `img/coreinfo` which can then be
loaded by for example SeaBIOS or GRUB.

Change-Id: I52661d486823bc4bb215ce92dca118c9d2c2a309
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13728
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-26 20:07:14 +01:00
Denis 'GNUtoo' Carikli 7d82499634 nvramcui: Add Makefile
Users had to build nvramcui manually because payload.sh was only meant
for abuild. Now the user can build it with:
  cd payloads/libpayload/ && make menuconfig && make && make install
  cd ../nvramcui && make

Change-Id: I409a3c39a1e1738e8071febb1a3f169e1aee959a
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/13778
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-26 20:06:41 +01:00
Martin Roth 22aa9e3fcc u-boot: Make sure targets aren't duplicated
When U-Boot isn't selected as a payload, two of the targets:
$(project_dir): and $(project_dir)/$(TAG-y) evaluated to the same
value, generating a make warning when running a clean.  By adding
additional text to the file that is created, this is avoided.

Gets rid of these warnings:
Makefile.inc:54: warning: overriding commands for target `u-boot'
Makefile.inc:37: warning: ignoring old commands for target `u-boot'

Change-Id: I4b4df753612b674b3ccde2a757338840be92d1f2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13767
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-24 19:22:52 +01:00
Julius Werner 09f2921b5d cbfs: Add LZ4 in-place decompression support for pre-RAM stages
This patch ports the LZ4 decompression code that debuted in libpayload
last year to coreboot for use in CBFS stages (upgrading the base
algorithm to LZ4's dev branch to access the new in-place decompression
checks). This is especially useful for pre-RAM stages in constrained
SRAM-based systems, which previously could not be compressed due to
the size requirements of the LZMA scratchpad and bounce buffer. The
LZ4 algorithm offers a very lean decompressor function and in-place
decompression support to achieve roughly the same boot speed gains
(trading compression ratio for decompression time) with nearly no
memory overhead.

For now we only activate it for the stages that had previously not been
compressed at all on non-XIP (read: non-x86) boards. In the future we
may also consider replacing LZMA completely for certain boards, since
which algorithm wins out on boot speed depends on board-specific
parameters (architecture, processor speed, SPI transfer rate, etc.).

BRANCH=None
BUG=None
TEST=Built and booted Oak, Jerry, Nyan and Falco. Measured boot time on
Oak to be about ~20ms faster (cutting load times for affected stages
almost in half).

Change-Id: Iec256c0e6d585d1b69985461939884a54e3ab900
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13638
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-22 21:38:37 +01:00
Aaron Durbin 152e5a03a1 libpayload: honor TSC information under CONFIG_LP_TIMER_RDTSC
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information
exported in the coreboot tables as the cpu_khz frequency. That
allows get_cpu_speed() not to be called which currently relies
on the 8254 PIT. As certain x86 platforms allow that device
to be optional or turned off for power saving reasons, allow
a path where get_cpu_speed() is no longer called. Additionally,
this approach also allows the libpayload to not duplicate logic
that already exists in coreboot.

BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed in payload TSC frequency is honored instead of
     using get_cpu_speed().

Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13671
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
2016-02-19 19:50:25 +01:00
Martin Roth dbae4d03ef Payloads: Add U-Boot as a coreboot-payload
- Add Kconfig and Makefile options to use U-Boot as a payload.
- Add Kconfig option for extra cbfstool command line arguments.
- Add Kconfig & Makefile option to load the payload as a flat binary.
- Add u-boot directory to .gitignore.

This is currently working for X-86 only.

Graphics worked in U-Boot correctly by initializing the VBIOS and
setting up a console mode.

Tested in QEMU and on Minnowboard Max.  Got into U-Boot, have not
booted an OS yet.

Change-Id: Ia122a4ad7cd7d96107c1552b0376c8106ca8fb92
Signed-off-by: Martin Roth <martinroth@google.com>
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/12714
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-18 20:53:42 +01:00
Vladimir Serbinenko 2e8117143a payloads/external/GRUB2: Add a possibility to add custom modules.
Change-Id: I3004eac248561b0cd4e44bcef90fc66fae5d77ca
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13727
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-02-17 18:41:39 +01:00
Martin Roth f80331f261 SeaBIOS: Disable serial console if serial is memory mapped
SeaBIOS only supports standard IO based serial ports.  If the serial
port being used by coreboot isn't a standard IO serial port, disable
the serial console in the SeaBIOS build.

Change-Id: I386b46625fca0bd0a5416ed9831f8370c294ed74
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13617
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-09 22:31:12 +01:00
Patrick Georgi d4adf58e03 libpayload: use 32bit access when accessing 4byte wide uart registers
This fixes serial on rk3288.

Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13636
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2016-02-09 21:53:42 +01:00
Martin Roth 21c0650fdd Kconfig: Move payloads section to payloads/Kconfig
Move the payloads section of the kconfig tree out of the top level
kconfig file and into a separate Kconfig just for payloads before
it starts to get added to.

Change-Id: I4f52818f862bf1aeba538c1c6ed93211a78b9853
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13608
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-09 20:31:52 +01:00
Ruilin Hao 5bcbd11b0d libpayload: Add timer driver for armada38x
Add timer driver for armada38x

BUG=chrome-os-partner:47462
TEST=emerge-cyclone libpayload
BRANCH=tot

Change-Id: Iefb6d1fcb907edb54d55ba8addfb66329af6c3c7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cd467160ecab050a541a445c2afab9e6bc625635
Original-Change-Id: Id42bafdbc34295b6f8afe5610fb3bab0e0e1b6e8
Original-Signed-off-by: Ruilin Hao <rlhao@marvell.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/313343
Original-Commit-Ready: Kan Yan <kyan@google.com>
Original-Tested-by: Kan Yan <kyan@google.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Yuji Sasaki <sasakiy@chromium.org>
Reviewed-on: https://review.coreboot.org/13114
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-04 11:32:22 +01:00
Martin Roth 50943b15a3 payloads/coreinfo: Add defaultbuild target
Add a single target to do the full coreinfo build using default Kconfig
values for both coreinfo and libpayload.

Change-Id: Id622fb2df480e826f6d868dbe01385d76587be26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13426
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 03:24:21 +01:00
Patrick Georgi 67e11d1e4f payloads: fix dependencies for seabios and filo
config and revision data need to be around before they're added to CBFS.

Change-Id: I195156773effd5137c3fda3639c002fbec6e7158
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12971
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-18 18:57:08 +01:00
Daisuke Nojiri d201e8c38a cbgfx: add error code to cbgfx_init
cbgfx_init can fail for multiple reasons. These codes help debugging
cbgfx_init.

BUG=chromium:502066
BRANCH=tot
TEST=Tested on Glados

Change-Id: Ifaa8d91b058bd838a53faf5d803c0337cb1e082c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4caf2496f3583e133f3f216ec401515c267e6e7b
Original-Change-Id: I84f60dd961db47fa426442172ab19676253b9495
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/315550
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12930
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-01-14 18:44:20 +01:00
Martin Roth d4c2484cc8 Makefile.inc: Move addition of payload rev & config to payload makefile
These files need to be added to cbfs-files after PAYLOAD_CONFIG
and PAYLOAD_VERSION have been defined.  Where they were before,
they didn't get added to the final build.

Change-Id: Ib1b230f9eb72a8c1710ef473a9f24c0fb7ec6e17
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12751
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-20 02:42:38 +01:00
Daisuke Nojiri 6d2c7226cb libpayload: add archive.h
archive.h is a header file for the programs which need to parse an archive
created by 'archive' tool. See archive.h for the format description.

BUG=chromium:502066
BRANCH=tot
TEST=Tested on Glados

Change-Id: I2bee9d7c12b0e1bce1529dfef360c5fa4ce0872d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311201
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://review.coreboot.org/12734
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-16 19:00:53 +01:00
Martin Roth 5a8d619a1c libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE
- Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed
CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE.
- CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the
default values for these new config options.

CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in
commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver)

Change-Id: I97461c5e0c14075dcf8a35c96a0b0f1651e2e8e4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12654
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-06 22:24:30 +01:00
Martin Roth 2a27a85809 libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE
- Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed
CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE.
- CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the
default values for these new config options.

CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in
commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver)

Change-Id: I2775c3676d5f458a4c31fe0c1d571bc2b9221a5c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12653
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-06 22:23:12 +01:00
Alexander Couzens 7b45d07cff SeaBIOS: remove VERSION variable in coreboot Makefile
SeaBIOS dropped support of VERSION variable and
is reproducible without it.

Change-Id: Iea1dc20e18aa5c274060e3cd55cd9e95086a602d
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12645
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
2015-12-06 00:44:12 +01:00
Patrick Georgi 864b48daf0 build system: add dependencies for GRUB2 and FILO
Make sure the build system knows how to start building the various
integrated payloads we support.

Change-Id: I2128d09c78795e0a41b055975e9f7052e3d951ee
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/12641
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-05 16:06:47 +01:00
Patrick Georgi ec90adb2e7 build system: Drop useless variable and dependency
We don't need COREBOOT_ROM_DEPENDENCIES anymore because the dependencies
are taken care of by the cbfs-files mechanism. REFCODE_BLOB also doesn't
need to be an explicit dependency.

Change-Id: I3f32cce79683e57a174724179bc2ac59a8cdda94
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12648
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-05 16:06:34 +01:00
Martin Roth 886f478925 external/Makefile.inc: Update SeaBIOS version file
SeaBIOS updated how versioning is done, and out/version.c no longer
exists.  The new file with version information is autoversion.h.

Change-Id: I10abee73ecc51e52c9ff7a2e7a9099339b1a4b40
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12567
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-12-04 18:57:08 +01:00
Alexander Couzens ac0bc0cd66 SeaBIOS: update stable release from 1.8.2 to 1.9.0
* The default boot menu key is now the ESC key (instead of F12)
* Initial support for Trusted Platform Module (TPM) hardware and BIOS calls
* Initial support for chain loading SeaBIOS from Grub (via multiboot
  support)
* Initial support for booting from SD cards on real hardware
* virtio 1.0 device support
* The build will no longer include the build hostname or build time on
  "clean" builds.  This makes the build binaries more "reproducible".
* Basic support for running SeaBIOS on Baytrail Chromebooks
* SeaVGABIOS improvements:
    * Improved support for old versions of x86emu (the "leal"
      instruction is now emulated)
* Several bug fixes and code cleanups

Change-Id: Ifbd50f1884959fed4c4f666b87f2ef7b4769c6d3
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12566
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-04 18:56:30 +01:00
Martin Roth 6e1192019e SeaBIOS/Kconfig: Remove SEABIOS_MALLOC_UPPERMEMORY option
This has been replaced by the PAYLOAD_CONFIGFILE option, allowing
any SeaBIOS config option to be set by a platform.

Change-Id: I584c4c481266740840158baba76581d68e69b448
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12570
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-03 21:54:08 +01:00
Martin Roth 99d05c74b6 payloads/external/SeaBIOS: Add option for saved SeaBIOS .config
Instead of adding various SeaBIOS options into the coreboot Kconfig,
just add a way to use saved SeaBIOS .config files.  These files
can contain full SeaBIOS .configs, but is really intended for individual
options.

The coreboot Kconfig options take precedence over the settings in the
saved .config.

Change-Id: Ia7f9c76555b8e290777207b3f637c94c4d67a782
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12568
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-03 21:52:48 +01:00
Daisuke Nojiri 03688ec1da libpayload: get cbfs offset & size for default media from lib_sysinfo
This change revives the path which was made inert by CL:308520. When
media == CBFS_DEFAULT_MEDIA, cbfs_get_file replaces it with a pointer
to a default media. Thus, get_cbfs_range does not set cbfs offset &
size from lib_sysinfo.

BUG=chrome-os-partner:47772
BRANCH=tot
TEST=Tested on Jerry and Glados

Change-Id: I012f7871336dd24b8eada5c96c4d72117921b0d2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 279ba344788b4ba85f500e6cfcca8199af6d0a89
Original-Change-Id: I7f0798881519026a23d0801d0a790332ab878ff0
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/313205
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12583
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-03 14:16:34 +01:00
Martin Roth cacbcf4815 coreinfo: use coreboot crosscompiler
Set up coreinfo makefile to use .xcompile and the coreboot 32-bit cross
compiler toolchain.

Restrict to x86_32 gcc compiler.

Tested in QEMU

Change-Id: I1cc180a5eeaf6cb9a36fdcef70a9819d0f459168
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12454
Tested-by: build bot (Jenkins)
Tested-by: BSI firmware lab <coreboot-labor@bsi.bund.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 16:07:40 +01:00
Patrick Georgi 4013469c50 build system: add dependencies for SeaBIOS output
Change-Id: I7b9f1574f6d487c0a6e5c9095c25ee973a96fa89
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12577
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-30 21:21:41 +01:00
Alexandru Gagniuc 4d5317e5a4 libpayload: Remove redundant 8250 MMIO32 UART driver
The more generic 8250 driver can handle both port-mapped and memory-
mapped 8250-compatible UARTs, with different register sizes. Thus, a
separate driver for MMIO32 is not needed.
The generic 8250 driver was tested to work for both output and input,
on Apollolake SoC, which only presents an MMIO32 UART.

Change-Id: Idab766588ddd097649a37de92394b0078ecc660a
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/12524
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-28 19:19:31 +01:00
Yasha Cherikovsky 37f4565b8b coreinfo: Rewrite bootlog_module
The old bootlog_module implementation was completely broken:
- It assumed that the console buffer is located at address 0x90000,
  and of size 64K. It is not correct nowadays.
- It displayed the buffer in a very hacky way, the code was riddled with
  TODOs and FIXMEs. Scrolling had sometimes unexpected behavior.

The new implementation:
- Uses the cbmem console as the source of data.
  It takes the console information from lib_sysinfo of libpayload, which is
  constructed from the coreboot tables (no more hardcoded adressess).
- Properly sanitizes the console buffer for display, which makes
  scolling and display much easier to implement.

Change-Id: I3f87ec920631da2acfd3f52273228703f22f469f
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12440
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-21 18:03:40 +01:00
Stefan Reinauer 5bbc5e5e0d libpayload: PDCurses: Remove trailing whitespace
find . -type f |xargs perl -pi -e 's, *$,,'
find . -type f |xargs perl -pi -e 's,	*$,,'

Change-Id: I62c2bc15b7c395a68b68422e701edf98b08e27c6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12399
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-20 16:27:36 +01:00
Yasha Cherikovsky b7eb1715ba coreinfo: Move screen dimensions to header
The screen dimensions need to be known in other files.

Change-Id: Idf6f02e4cadbece78096ccd464296ecec405574d
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12439
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-19 17:32:24 +01:00
Yasha Cherikovsky ae16c4034c coreinfo: Fix off-by-one in displayed month of year
According to C documentation, the range of tm_mon in struct tm is [0, 11].
Before the patch, the displayed month was indeed incorrect.

Change-Id: I9f95f1e978c45b3635e2edfe1ec496d7b0dec00a
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-19 00:02:13 +01:00
Yasha Cherikovsky 619fc95e7c coreinfo: Hide blinking cursor
Change-Id: I6297fc178203dcfbd0b2a4c78dd83359e7804933
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12437
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-19 00:01:51 +01:00
Furquan Shaikh fe35623f20 libpayload: udc/dwc2: Ignore setup packet in check for queue empty
during shutdown

DWC2 UDC controller always requires an active packet to be present in
EP0-OUT to ensure proper operation of control plane. Thus, during
shutdown ignore EP0-OUT for queue empty check if only 1 packet is
present.

BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. "fastboot reboot-bootloader" reboots
device without timeout in udc shutdown.

Change-Id: Iafe46c80f58c4cd57f8d58f060d805b603506bbd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4e7c27d849c0411aae58e60a24d8170a27ab8485
Original-Change-Id: Ifa493ce0e41964ee7ca8bb3a1f4bb8726fa11173
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311257
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12413
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2015-11-13 00:53:02 +01:00
Furquan Shaikh 1dcb10eeb6 libpayload: queue: Add a helper macro for checking singleton queue
Check if the simple queue consists of only 1 element.

BUG=b:24676003
BRANCH=None
TEST=Compiles successfully.

Change-Id: Ib257a5e6b9042b42c549f8ad8b943e3b75fd8c9c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5435d6fec1c4fbb4c04ba5b8c15caff9ee4e50f0
Original-Change-Id: I7a8cb9c4e7e71956e85e65b3e7b8e0af4d354110
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311256
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12412
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2015-11-13 00:52:58 +01:00
Stefan Reinauer 4f85a1eb76 libpayload: Rename PDCurses-3.4 to PDCurses
Change-Id: If881ec130833c7e7e62caa3d31e350a531f5bc8e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12398
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 21:38:48 +01:00
Stefan Reinauer 2ea24dabd6 PDCurses: Don't hard code version number
Don't hard code the PDCurses version number in every file
added to the object list.

Change-Id: Ic2e9230b7e3089c60dd7f442e3ea7baffb4aa400
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12397
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 21:38:34 +01:00
Furquan Shaikh bf54c2cc5c libpayload/udc: dwc2: Add handler for add_strings
BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. fastboot devices shows serial number for
shark.

Change-Id: I61d6c168fa458d1f880bc566db997aa5d6398361
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 45b286b318281aea9a4b0362c9259d748b66fd28
Original-Change-Id: Ib9cc22de9daa6c5ec9cde1e62c6f5f768e946069
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310984
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12348
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 14:10:39 +01:00
Furquan Shaikh 3d6c95c1cd libpayload/udc: dwc2: Add timeout for shutdown operation
BUG=b:24676003
BRANCH=None
TEST=Verified that udc shutdown returns after the timeout.

Change-Id: I5df598c4eddecbecb353343ef5a4e44eae4fc20b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 268913f21adea9969c9f88e3cb759341a60719f0
Original-Change-Id: I3ee059791d6e821f83f9ac41fd7c5385bd60e21e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310983
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12347
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-11-10 14:10:02 +01:00
Rajmohan Mani 1528ffa57c libpayload: xhci: Add delay to get reset working more reliably
Existing Intel xHCI controllers require a delay of 1 ms,
after setting the CMD_RESET bit in command register, before
accessing any HC registers. This allows the HC to complete
the reset operation and be ready for HC register access.
Without this delay, the subsequent HC register access,
may result in a system hang, very rarely.

Verified CherryView / Braswell platforms go through over
1000 warm reboot cycles (which was not possible without
this patch), without any xHCI reset hang in depthcharge.

BRANCH=None
BUG=None
TEST=Verified CherryView / Braswell platforms go through
over 1000 warm reboot cycles, without any xHCI reset hang
in depthcharge.

Change-Id: I8eff5115ca52738bdcf8bc65fbfb2a5f60a0abe1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3e7ea70df36e3bf35a6ee1297640900ee76bfdac
Original-Change-Id: Id681a19d0eedb0e2c29e259c5467bcde577e3460
Original-Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310022
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12325
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2015-11-05 17:40:30 +01:00
Patrick Georgi 102245fbed libpayload: Avoid confusing usb debug output in dwc2 driver
enqueue_packet already runs start_ep_transfer, which enqueues the next
job. It's pretty much guaranteed that the port will look busy.

BUG=none
BRANCH=none
TEST=no spurious ep 0-0 busy messages

Change-Id: I9cbfa7b51dd37564262295ddbcdd0755da40c05b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8997dbd78dc363334f4e22eaa61f25de1449ffba
Original-Change-Id: I8a39713fc1d6f16b80284e0f21dc95685716a9b7
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308763
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12259
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05 17:39:58 +01:00
Patrick Georgi b791799d9a libpayload: Fix building dwc2 UDC driver with debug enabled
hexdump() now takes a pointer instead of an int-containing-an-address.

BUG=none
BRANCH=none
TEST=building with USB_DEBUG works

Change-Id: Idd0c43031a212c8f3b6489f533c488805d98d6a9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8660f6091bb124eeabe73302e8c7f1a8e46324f1
Original-Change-Id: I266efcb8b939d6da104ad05a3e79a78065c60beb
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308762
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12258
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05 17:39:52 +01:00
Patrick Georgi f86d035105 libpayload: Allow non-default CBFS media
CBFS requests were always fulfilled using the CBFS specified in
cbtables. That's a great policy when default requests are sought, but
not so great when the user deliberately asked for something else.

So check if they want default CBFS media information, otherwise ignore
cbtables data.

BUG=chromium:445938
BRANCH=none
TEST=none

Change-Id: I01b63049eebfba6f467808ac84ef77385840c204
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 621c916ab14c0de4bae3dde09c05060c4f3c63c5
Original-Change-Id: Ia4a8848fd7db9d9a2bf9f5c226566fe3936ff543
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308520
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12232
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05 17:39:42 +01:00
Patrick Georgi a73b93157f tree: drop last paragraph of GPL copyright header
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.

This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.

Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-31 21:37:39 +01:00
Julius Werner 8db7e6702b libpayload: usbmsc: Add small delay during initialization to fix CZ60
We found that some SanDisk Cruizer Glide CZ60 sticks (confirmed on 16GB
and 64GB versions) have a problem responding to our first GET_MAX_LUNS
request right after they received their SET_CONFIGURATION. They will
continually return a NAK until the host gives up (which is 2
user-noticable seconds for us). Adding a small delay of about 15us seems
to be enough to fix the issue, but let's do 50 to be save.

Confirmed with both MT8173 and Intel LynxPoint XHCI controllers.

BRANCH=None
BUG=chrome-os-partner:45473
TEST=No notable delay before detecting stick on Oak and Falco.

Change-Id: Ib03944d6484de0ccecbb9922d22666f54c9d53dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 589f19a901275fb8b00de4595763a7d577bed524
Original-Change-Id: I95c79fe40d3ad79f37ce2eb586836e5de55be454
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/308980
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12229
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-29 21:06:45 +01:00
Patrick Georgi 564fbbeac9 libpayload: Fix building dwc2 UDC driver
Change Ie54699162 changed a structure's name and field names and we
didn't notice. Adapt.

BUG=none
BRANCH=none
TEST=building with UDC_DWC2 works

Change-Id: I592ebc29b2a08a23e6dbc9d2186807cbbbbca330
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3dda8ad5ffc36593d8b8fd6664a7f9b4816f0f93
Original-Change-Id: I4a065de0f4045a01bef1dc9fbb2e0578b5508518
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308791
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/12228
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-10-29 21:06:38 +01:00
Daisuke Nojiri 2ccb280f51 cbfs: read cbfs offset and size from sysinfo
This change allows libpayload to read cbfs offset and size from sysinfo.
Legacy way of locating cbfs reagion is still supported in case sysinfo
doesn't store the offset and the size.

BUG=none
BRANCH=master
TEST=tested on samus and smaug

Change-Id: I86434fd249467e7c90d59d6b82f0e6c514bc2d05
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 548a74b7a0758c3f9ba6809425d0fb9c6a5e9d7c
Original-Change-Id: I190d5545a65228483204bf1aa1cbf5a80db31ae0
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/296993
Original-Commit-Ready: Daisuke Nojiri <dnojiri@google.com>
Original-Tested-by: Daisuke Nojiri <dnojiri@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11557
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-28 22:26:17 +01:00
Jason A. Donenfeld a5c5db37ee cbgfx: Fix spelling of calculate_position()
Change-Id: Ib0dc14b197091450596ad01a924539b0e69acd68
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-on: http://review.coreboot.org/12216
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-10-28 17:09:59 +01:00
Patrick Georgi 990ae70698 libpayload/libcbgfx: Add license headers
Change-Id: I09a9d9eef9d8fe45cdd4d68d29b8d662fe5956e1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12164
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-27 16:49:10 +01:00
Daisuke Nojiri dcc63b6cb7 cbgfx: remove load_bitmap
load_bitmap is no longer needed.

BUG=none
BRANCH=master
TEST=Tested on Samus
CQ-DEPEND=CL:305589

Change-Id: I4e598ade20a5d49850f9ad0f13681ea5d16cd8c7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 125bbc98195cbb8378ba0e4c7fece85ffca4cdfa
Original-Change-Id: I64d685f7a6367b03455ae2a206b9936613614a24
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/305517
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11930
Tested-by: build bot (Jenkins)
2015-10-27 15:22:53 +01:00
Daisuke Nojiri 20b7907041 cbgfx: add get_image_dimension
get_image_dimension returns the width or height of the image projected on
canvas.

This is necessary for example when two images of different lengths have to
be placed side by side in the center of the canvas and the widths of the
images must be adjusted according to the height.

BUG=chromium:502066
BRANCH=tot
TEST=Tested on Samus

Change-Id: I119c83891f48046e888b6b526e63348e74f8b77c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: d1a97f0492eb02f906feb5b879b7b43518dfa4d7
Original-Change-Id: Ie13f7994d639ea1556f73690b6b6b413ae64223c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/304113
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11929
Tested-by: build bot (Jenkins)
2015-10-27 15:22:41 +01:00
Daisuke Nojiri 9aed1465d7 cbgfx: make the code more descriptive
This change makes the code in graphics.c more descriptive and readable.
Especially, it makes expressions for scale calculation look what they
are meant to do. It also includes:

- Rename variables (struct fraction, dim_org, etc.) for more consistency
- Add more input validation (div-by-zero, etc.)

BUG=chromium:502066
BRANCH=master
TEST=Tested on Samus
CQ-DEPEND=CL:304860

Change-Id: I2694912bb7b6017d5655de2fd655b95432addb22
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 0863dc3ee925d3a05c83c66397b19a57f5478ef3
Original-Change-Id: Id8e349b8e09082fb84c3e1a984617f916e16c518
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/304861
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11928
Tested-by: build bot (Jenkins)
2015-10-27 15:22:33 +01:00
Daisuke Nojiri a11e3ff160 cbgfx: add pivot option to draw_bitmap
This change adds 'pivot' option to draw_bitmap. It controls the point of the
image based on which the image is positioned. For example, if a pivot is set
to the center of the image horizontally and vertically, the image is
positioned using pos_rel as the center of the image.

This feature is necessary, for example, to place a text image in the center
of the screen because each image has a different width depending on the
language.

This change also makes draw_bitmap accept both horizontal and vertical size.
If either of them is zero, the other non-zero value is used to derive the
size to keep the aspect ratio.

Specifying the height is necessary to keep font sizes the same when drawing
text images of different lengths.

draw_bitmap_direct is a variant of draw_bitmap and it draws an image using
a native coordinate and the original size (as opposed to the location and
the size relative to the canvas).

CL:303074 has real use cases.

BUG=none
BRANCH=tot
TEST=Tested on Samus

Change-Id: I5fde69fcb5cc9dc53e827dd9fcf001a0a32748d4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 82a0a8b60808410652552ed3a888937724111584
Original-Change-Id: I0b0d9113ebecf14e8c70de7a3562b215f69f2d4c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302855
Reviewed-on: http://review.coreboot.org/11927
Tested-by: build bot (Jenkins)
2015-10-27 15:22:24 +01:00
Daisuke Nojiri f86515244a cbgfx: use bilinear interpolation to scale bitmap
This change replaces the current scaling algorithm (nearest neighbor) used
for bitmap rendering with the bilinear interpolation, which has much better
reproduction.

BUG=none
BRANCH=tot
TEST=Tested on Samus

Change-Id: I02520883debb7db40ffc19d4480244e0acabc818
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 764b383c1763a022728f2b2d9fb90e27c9e32e94
Original-Change-Id: I0ddd184343428904d04d8a76fe18a885529c7d3d
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302195
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/11926
Tested-by: build bot (Jenkins)
2015-10-27 15:22:16 +01:00
Daisuke Nojiri bed16d9706 cbgfx: add load_bitmap
This change adds load_bitmap API, which loads a bitmap file from cbfs
and returns a pointer to the image data.

BUG=none
BRANCH=tot
TEST=Tested on Samus

Change-Id: I7d7874f6f68c414dc877a012ad96c393e42dc35e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 9d33e713a0cf6bd1365418dad989e47e86db01e4
Original-Change-Id: Idbf9682c2fa9df3f0bd296ca47edd02cd09cfd01
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302194
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/11925
Tested-by: build bot (Jenkins)
2015-10-27 15:22:10 +01:00
Daisuke Nojiri fed269b1c4 cbgfx: add clear_screen
clear_screen clears the screen with the specified color.

BUG=none
BRANCH=tot
TEST=Tested on Samus

Change-Id: I45e61c67485dbdbe15e2b602718232bc6382ad00
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 1ab04e2cc8d3c3e36e4eb41d9e7b0fdc25595200
Original-Change-Id: I1b3890b9e8ca52e796f417b5f41d4fa02a97a255
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/301451
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/11924
Tested-by: build bot (Jenkins)
2015-10-27 15:22:00 +01:00
Daisuke Nojiri dd49eccb50 cbgfx: allow draw_bitmap to render outside canvas
This change allows draw_bitmap to draw an image outside the canvas
with the original size if the scale parameter is zero. This is used
for example when drawing a splash screen which has to be positioned
at a pixel perfect location.

BUG=none
BRANCH=master
TEST=Draw pictures and boxes on Samus and Ryu

Change-Id: Ia2d8799184d1aa192e2c50850e248bee8f234006
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 45d4717fe5c3e3554bd79b63ade490d88cf00bbe
Original-Change-Id: I48aa21122cfc2ee43bcb1b8f87b00c66abdc230e
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295961
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11923
Tested-by: build bot (Jenkins)
2015-10-27 15:21:53 +01:00
Daisuke Nojiri 09ad206cda cbgfx: add draw_bitmap
draw_bitmap renders a bitmap image on screen with position and sizes
scaled relative to the screen. images are scaled up or down by nearest
neighbor interpolation.

BUG=chrome-os-partner:43444
BRANCH=tot
TEST=drew bitmap images on Samus

Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c910c9cdb7efc53aace067bd081aeefc07556811
Original-Reviewed-on: https://chromium-review.googlesource.com/290302
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295532
Reviewed-on: http://review.coreboot.org/11584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27 15:21:42 +01:00
Daisuke Nojiri 3f66398ef8 cbgfx: coreboot graphics library
This change introduces cbgfx, a graphics library, which provides APIs for
drawing basic shapes, texts, graphic data, etc. on a screen.

BUG=chrome-os-partner:43444
BRANCH=tot
TEST=Drew boxes by draw command of depthcharge cli on Samus

Change-Id: I6019e5998e65dca3ab4785a90669b5db02463d2e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 5b3ebce8eae91be742e4f977d3407d24e1537580
Original-Reviewed-on: https://chromium-review.googlesource.com/290301
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Change-Id: I10db27715cb907bdc451a33ed99d257e3af241b7
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291065
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11408
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27 15:21:31 +01:00
Shawn Nematbakhsh ff5d0b2518 libpayload: usb: Retry get_descriptor() on failure
Certain Lexar USB disks may fail during the first calls to
get_descriptor(..., DT_CFG, ...) for unknown reasons. Therefore, make
several attempts before giving up.

BUG=chromium:466758
TEST=Manual on Samus. Go to recovery mode, verify that Lexar LJDS70 USB
stick is bootable.
BRANCH=None

Change-Id: I476ac22f9c4f844c60ebc6e53af8c144d70bb9d4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 93a0570b343479dd22506ad4d7961f0ea4251f8c
Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Change-Id: Ie581c7c71c53816065c7f59202581888a79e445e
Original-Reviewed-on: https://chromium-review.googlesource.com/302403
Original-Commit-Ready: Shawn N <shawnn@chromium.org>
Original-Tested-by: Shawn N <shawnn@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12133
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27 15:00:16 +01:00
Patrick Georgi 744729a4f0 libpayload: Add ptrdiff_t typedef
vboot2 in payloads (eg depthcharge) needs it.

Change-Id: I4e79ae29cc282c8680f21686befd35c4ff461b3a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/11922
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2015-10-20 16:50:25 +02:00
Maxime de Roucy 8190078ad5 coreinfo: reboot when finished
Behave as nvramcui.
Avoid a "General Protection Fault Exception" when launched by SeaBIOS on
pcengines APU1.

Change-Id: I00b1f859f76e693e8d49a38c1e02f4f49add85b7
Signed-off-by: Maxime de Roucy <maxime.deroucy@gmail.com>
Reviewed-on: http://review.coreboot.org/11731
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-17 06:55:54 +00:00
Paul Menzel dc1b3c162e libpayload/Kconfig: Use official spelling for TinyCurses
TinyCursess is officially spelled in CamelCase [1].

[1] https://github.com/tommyettinger/TinyCurses

Change-Id: I7e0aa5af54140796a981c0f4c58950b25fdd67ba
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/11727
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-17 06:53:52 +00:00
Paul Menzel aa98eec316 libpayload/configs: Add default configuration with TinyCurses enabled
Change-Id: Ib057e2b5f15b8d5bcdf45666f8761614317d25ee
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/11726
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-17 06:53:37 +00:00
Patrick Georgi 78517f3a45 libpayload: Add data structures for hashes in file attributes
Taken from cbfstool.

Change-Id: I4387900517dbfb1aa51ae6f679e26d0cf5b2acf8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/11808
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-11 12:36:24 +00:00
Nico Huber bda38eece8 libpayload: Check for CBFS_DEFAULT_MEDIA in cbfs_get_file_content()
The error-prone interface of cbfs_get_file_content() led to another
possible NULL dereferencing. So check for CBFS_DEFAULT_MEDIA here
like the other functions do.

Change-Id: Ib8732160d389e9ecceb44f28be0e7de9a1d66e04
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11796
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-05 15:23:54 +00:00
Nico Huber ac1f4b86f4 libpayload: Fix possible NULL deref in cbfs_get_file_content()
Change-Id: I2e10ccac3248717d90838ca721cc691de792b507
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11780
Tested-by: build bot (Jenkins)
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2015-10-02 19:19:32 +00:00
Jimmy Huang c159a0ec4a arm64: mmu: Prevent CPU prefetch instructions from device memory
Set XN bit of block upper attribute to device memory in mmu. CPU may
speculatively prefetch instructions from device memory, but the IO
subsystem of some implementation may not support this operation. Set
this attribute to device memory mmu entries can prevent CPU from
prefetching device memory.

BRANCH=none
BUG=none
TEST=build and booted to kernel on oak-rev3 with dcm enabled.

Change-Id: I52ac7d7c84220624aaf6a48d64b9110d7afeb293
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7b01a4157cb046a5e75ea7625060a602e7a63c3c
Original-Change-Id: Id535e990a23b6c89123b5a4e64d7ed21eebed607
Original-Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/302301
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11722
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-28 09:36:32 +00:00
Daisuke Nojiri 9dcf457707 cbfs: fix debug message
BUG=none
BRANCH=tot
TEST=built for Samus with debugging enabled

Change-Id: I0b555d018f8c2eb1b51519a6227298c8d5d58a42
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5908e4b8ffc66e6ecc7cae78cf10055fbd727c81
Original-Change-Id: Ifd049111fee540789dabb1d7653568b80405b77d
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302131
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11713
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-28 09:33:20 +00:00
Patrick Georgi eb33b3f80e libpayload: provide cbfs_file_find_attr()
cbfs_file_find_attr(file, tag) finds the first attribute of file with
the given tag.

Change-Id: I78ee3b996b4b086605244c5d7d57ef7e3fc1db47
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11678
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-09-17 20:13:47 +00:00
Daisuke Nojiri d66f1da846 libpayload: allow compression at file header level
Decompression is handled transparently within cbfs_get_file_content:

	const char *name = "foo.bmp";
	void *dst = cbfs_get_file_content(media, name, type, NULL);

To keep things consistent, a couple of API changes were necessary:
- cbfs_get_file_content always returns a copy of the data, even for
  uncompressed files. It's the callers responsibility to free the
  memory.
- same for cbfs_load_payload and cbfs_find_file.
- cbfs_load_optionrom doesn't take a "dest" argument anymore but always
  returns a copy of the data, for compressed and uncompressed files.
  Like with cbfs_get_file_content, the caller is responsible to free it.
  It also decompresses based on extended file attributes instead of the
  cbfs_optionrom subheader that libpayload specified but that (AFAIK)
  nobody ever used, given that there's not even tooling for that.

Change-Id: If959e3dff9b93c6ae45ec7358afcc7840bc17218
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10938
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-09-17 18:52:56 +00:00
Daisuke Nojiri 5c6dc72501 libpayload: rename cbfs variable from name to vardata
The dynamically sized region after struct cbfs_file doesn't contain only
the file name anymore.

Change-Id: I3241cb2f0cbec3fcf4d3c27d638e2847e43f4761
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11676
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17 18:52:41 +00:00
Patrick Georgi 377d1db57d libpayload: bring in file attribute support from cbfstool
This comes from cbfstool (GPL) into libpayload (BSD-l), but I could have
just as well written it in libpayload first.

Change-Id: I86baefe5c299125a4733fa20523efd5d06de7182
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11675
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-17 18:48:10 +00:00
Yunzhi Li 87c9f0eaa9 libpayload: usb: dwc2: check device connect state before enable channel
If the device has already been disconnected then we shouldn't enable
host channel to start any transfer, otherwise this channel goes into
an odd state the channel is enabled but can not be disabled by set
hcchar.chdis=1. So we need check the device connect status before
enable channel.

BRANCH=None
BUG=chrome-os-partner:44534
TEST=None

Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ae3e690b2cd4a9ea8b5766ac873b0e00bf3a23de
Original-Change-Id: Ib3ecf486649ca11b302144f9c00a5e88424e90fa
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/298402
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit ea96f947b5304fdde2e0991d23febaeba209dde1)
Original-Reviewed-on: https://chromium-review.googlesource.com/299398
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>

Change-Id: Idf48ffbc4c2794900e09dec6b2e34e33b21f87b4
Reviewed-on: http://review.coreboot.org/11662
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17 14:18:30 +00:00
Yunzhi Li a881000cd1 libpayload: usb: dwc2: fix hub hot-plug bug
When disconnect is detected in dwc2_split_transfer() the split
configuration registers should be cleared before return.

BRANCH=None
BUG=chrome-os-partner:44534
TEST=On Jerry, usb hot plug works with devices behind hubs

Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 37594d8b4490b6d393d19d17d8e497db7de8817d
Original-Change-Id: Ie1eecec067305874513c6ceb95df4240dc393cd6
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/295625
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit d543e14cdc73bd549dd553c8d1d07672a1307981)
Original-Reviewed-on: https://chromium-review.googlesource.com/299700
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>

Change-Id: Ib4604097743f2f9d763b29ee27f3bc1788a85a62
Reviewed-on: http://review.coreboot.org/11661
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17 14:18:08 +00:00
Nico Huber 66cc843f3d libpayload: Revive ffs()
Revive ffs() in a more fancy way (that is more likely to be accepted).
We dropped it in
  7a8a4ab lib: Unify log2() and related functions
but there is at least one user: flashrom.

Change-Id: I4e3fc15816b778e640bceea0d89cd9624d271c2e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11591
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-10 20:11:33 +00:00
Nico Huber a7c609c262 libpayload: Fix merge of PL011 UART support
Wished I hadn't seen that. Git saw the conflict (file was gone), both
committer and reviewer thought it would be a good idea to re-add it as
dead code (see 558e9b5: libpayload: Add minimal support for PL011 UART).

Change-Id: Ifea8113fbc59e0463eaedb86b976f54ec11113a9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-10 09:19:11 +00:00
Nico Huber 602a82af7c libpayload: Add missing autoconf dependency
With new version of kconfig we have to trigger [silent]oldconfig each
time .config changed. We missed that, because config.h had no dependen-
cies.

Change-Id: I9f0dd8adbc3aa434a18cb4815b1ccbd1f6e7847b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11603
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-09-10 09:18:12 +00:00
Daisuke Nojiri ccda446e52 video_printf: align text
This change allows video_printf to left/center/right-align text depending on
the enum value provided by the caller. This is useful especially because usually
the length of formatted string is unknown before calling video_printf.

BUG=none
BRANCH=smaug
TEST=drew fastboot screens on Smaug
CQ-DEPEND=CL:296460

Reviewed-on: https://chromium-review.googlesource.com/292929
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 436f05f60c1b88626740a35913e3ad37b5c777a3)
Change-Id: If1d50b7d8ddaa86eddc1618946756184cb87bfe1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295413
Reviewed-on: http://review.coreboot.org/11583
Tested-by: build bot (Jenkins)
2015-09-08 11:51:55 +00:00
Daisuke Nojiri abe03d25e2 video: add video_printf
video_printf prints strings on the screen with specified foreground and
background color.

BUG=none
BRANCH=smaug
TEST=verified messages printed on Smaug

Change-Id: I619625f7d4c5bc19cd9de64a0ba07899cf9ba289
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: e0ac4cb4c0d43b40f5c8f8f5a90eac45b0263b77
Original-Reviewed-on: https://chromium-review.googlesource.com/290130
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-(cherry picked from commit 75ea2c025d629c8fabc0cb859c4e8ab8ba6ce6e3)
Original-Change-Id: Ief6d1fc820330b54f37ad9260cf3119853460b70
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290373
Reviewed-on: http://review.coreboot.org/11407
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-08 11:51:26 +00:00
Stefan Reinauer 4460703f59 Drop "See file CREDITS..." comment
coreboot has no CREDITS file.

Change-Id: Iaa4686979ba1385b00ad1dbb6ea91e58f5014384
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11514
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-07 15:54:50 +00:00
Alexander Couzens 3ed0d85d52 SeaBIOS: update stable release from 1.7.5 to 1.8.2
Several USB timing fixes for USB controllers on real hardware
Initial support for USB3 hubs
Initial support for SD cards (on QEMU only)
Initial support for transitioning to 32bit mode using SMIs (on QEMU TCG only)
SeaVGABIOS improvements:
 Added cursor emulation to coreboot native init vgabios (cbvga)
 Added support for read character calls when in graphics mode

Change-Id: Ic99f11dea4c87dbf3e9de4ce7f14064d0a083101
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/11479
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-09-05 15:49:02 +00:00
Alexandru Gagniuc fdbc1af5e2 Kconfig: Remove EXPERT mode
After much consideration, and many years of an EXPERT mode sitting
almost completely unused, we've seen that it doesn't work for us.
There is no standard on what constitutes EXPERT, and most of
coreboot's options Kconfig are expert-level.

We even joked that not selecting "EXPERT" should prevent coreboot
from compiling:

@echo $(shell whoami) is not permitted to compile coreboot

Change-Id: Ic22dd54a48190b81d711625efb6b9f3078f41778
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11365
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-08-30 07:50:47 +00:00
Duncan Laurie 5c25d0e8cc libpayload: x86: Add read/write{8,16,32} variants that match coreboot
Add the now coreboot standard MMIO read/write accessors that were
already defined for other architectures but not x86.

This leaves the old read/write{b,w,l} variants in place as was done
on the other architectures, presumably to support old payloads that
have not been updated.

BUG=chrome-os-partner:43072
BRANCH=none
TEST=emerge-glados libpayload
CQ-DEPEND=CL:294711

Change-Id: I5ae3d755adcef0f6ff27aaa7c35a5b12ddc32e22
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: c09dd557050e3002fa5b8504980d72d4cb79a56c
Original-Change-Id: I58d928338335d3fe4bb7fe2bdc9c2967d8689118
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294565
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11405
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-08-28 06:46:28 +00:00
Julius Werner e8a8a00342 libpayload: usb: dwc2: Always return 'size' transferred bytes for OUT
Seems like our transferred bytes calculation for OUT transfers that span
more than one packet had been wrong, and we just got lucky that we never
noticed it before. The HCTSIZ.xfersize register field we're reading only
counts bytes transferred by the last packet we sent.

OUT endpoints cannot have short transfers -- every transfer should
either finish all bytes we wanted to send or end in a proper error
condition. Therefore, in the absence of an error we can just conclude
that all input bytes have been transferred.

BRANCH=veyron
BUG=chrome-os-partner:35525
TEST=SMSC95xx netboot on Jerry now works.

Change-Id: I57349e697c428df6b56e2f6f62e87652ef1e7a94
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 0abee13b6d89dec12c6fff581ece1836393c7703
Original-Change-Id: Id0a127e6919f5786ba05218277705dda1067b8c3
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/293956
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/11404
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-28 06:46:19 +00:00
Julius Werner 4bfa29e947 arm64: xcompile: Add support for A53 erratum 843419
This patch adds support to enable a linker workaround to a hardware
erratum on some early Cortex-A53 revisions. Since the linker option was
added very recently, we use xcompile to test whether the toolchain
supports it first. It is also guarded by a Kconfig since only a few
ARM64 SoCs will need this and it incurs a performance penalty.

BRANCH=none
BUG=none
TEST=Turned it on or off for Smaug and confirmed that it (dis)appeared
in verbose make output accordingly.

Change-Id: I01c9642d3cf489134645f0db6f79f1c788ddb00d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 57128785760c4dfa32d6e6d764756443a9323cb7
Original-Change-Id: Ia5dd124f484e38460d75fb864304e7e8b18d16b7
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294745
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11403
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2015-08-28 06:46:09 +00:00
Nico Huber f58746bd33 libpayload: Fix default_memmove() implementation
If I wanted to fill the whole memory address space with one byte, I
wouldn't try it that subtle.

With size_t beeing unsigned the loop condition >= 0 was always true.

Change-Id: Idee6a4901f6697093c88bda354b5e43066c0d948
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11286
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-08-19 16:35:08 +00:00
Martin Roth 7b928cd0c3 Store the payload config and revision in CBFS
Store the payload config and version files in CBFS if using a
SeaBIOS or filo payload if INCLUDE_CONFIG_FILE is enabled.

Change-Id: I0c1b4da8f6179b9cee06cecfa76bc631b43196e0
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10607
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-08-19 15:52:22 +00:00
Yunzhi Li 4938426783 libpayload: usb: dwc2: fix usb plug/unplug bug
Check device connect status while waiting for usb transfer complete
Avoid coreboot get stuck when usb device unplugged

BUG=chrome-os-partner:35525
TEST=None
BRANCH=None

Original-Change-Id: Id103501aa0d8b31b0b81bef773679c0fad79f689
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292630
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292966
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>

Change-Id: I49396b74131dbfda505d9d3de5adbdc87eb92ce1
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/11236
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-19 14:04:15 +00:00
Patrick Georgi 41fceafb09 seabios integration: deal with ccache woes some more
seabios integration interprets the CC variable with a special case when
ccache is prepended to the compiler.
Since the integration also tries to extract compiler flags (which I'm
not sure we still add to CC _ever_), that also needs to look at only
the part of the string that contains compiler and (maybe) flags, so
skip the first word if it was determined to be the path to the ccache
binary.

Change-Id: I717863f456bf4fd6f08427d86633079ecda039df
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11227
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-15 06:33:01 +02:00
Julius Werner 6f4c7a6fde libpayload: usb: xhci: Fix list of cleared port change bits
The xhci_rh_port_status_changed() function tries to always clear all
port status bits, even though most of them don't interest us. This is
generally a smart thing to do since not clearing a status bit may cause
the controller to not generate any more Port Status Change Events.
However, the bitmask we currently use doesn't cover bit 23 (Port Config
Error Change) and instead covers bit 16 (Port Link State Write Strobe)
which is not really related to this and not a W1C bit. Probably a typo,
so let's fix that.

BRANCH=None
BUG=None
TEST=Plugged/unplugged a bunch of USB devices on an XHCI Falco.

Original-Change-Id: Ia83f5b72cce094859c0f0e730752d7b5cfa6e1c6
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291842
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I11f5fe38cb70055daf6e866a8ee84ca80488e3bf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11194
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:18:16 +02:00
David Hendricks 75daee5ee9 libpayload: Do not gate USB_DWC2 on USB_HID
This forward-ports the change from CL:277155 since the Kconfig file
was renamed from Config.in.

BUG=chrome-os-partner:41416
BRANCH=none
TEST=built and booted on Mickey, keyboard works at dev screen
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>

Original-Change-Id: Ibffa5188df51ecd7b8bdd631d4b767ec64130819
Original-Reviewed-on: https://chromium-review.googlesource.com/291138
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

Change-Id: Iebb1da6ec8c7886a6eb9ebcc67b59d617496c555
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/11188
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@google.com>
2015-08-14 15:17:36 +02:00
Julius Werner 57ddd9abc7 libpayload: usb: xhci: Count new Max Scratchpad Bufs bits from XHCI 1.1
The 1.1 revision of the XHCI specification added an extra 5 bits to the
Max Scratchpad Bufs field of HCSPARAMS2 that newer controllers make use
of. Not honoring these bits means we're not allocating as many
scratchpad buffers as the controller expects, which means it will
interpret some uninitialized values from the end of the pointer array as
scratchpad buffer pointers, which obviously doesn't end well. Let's fix
that.

BRANCH=none
BUG=chrome-os-partner:42279
TEST=Makes a USB-related memory corruption issue disappear.

Original-Change-Id: I7c907492339262bda31cdd2b5c0b588de7df8544
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Iba1007bfebffe1f564f78bb875fff9ba0fe11a38
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11189
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:17:30 +02:00
Yunzhi Li 8b4988933c libpayload: usb: dwc2: fix short packet transfer
If short packet detected, stop this transfer and return the actual
transferred size

BUG=chrome-os-partner:42817
TEST=Netboot could run well
BRANCH=None

Original-Change-Id: Icb4317f48aa04ac15bb1886b81d2e3c472d123d0
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/288215
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit d372343b4e3d664ce2d76dbf55a5061b5d496bba)
Original-Reviewed-on: https://chromium-review.googlesource.com/291064
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>

Change-Id: I43d9edffe2074c037f2df203621863e54d2597fa
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/11187
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:17:18 +02:00
Chunfeng Yun b4a24995c9 libpayload: usb: Fixup wrong use of config
replace CONFIG_LP_XHCI_MTK_QUIRK by CONFIG_LP_USB_XHCI_MTK_QUIRK

BRANCH=none
BUG=none
TEST=Rev0-oak

Original-Change-Id: I68f58ed3b02caa7cef8f0f60a4a8f5e9755c97a7
Original-Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/290522
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>

Change-Id: I316712e99e0b44d292dab27cf66e26837dc2e957
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-on: http://review.coreboot.org/11179
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:14:18 +02:00
Julius Werner 5f9a3f7fae libpayload: xhci: Carry over fixes from Chromium tree
This patch re-adds a few fixes that originally went into the
chromeos-2013.04 tree. I kinda seem to have slipped them into the
backport of Nico's original XHCI patch (crosreview.com/168097) instead
of making a new change, which was not very clever and caused them to be
forgotten in the later upstreaming wave.

Changing internal XHCI error numbers is just a cosmetic change to make
them uniquely identifyable in debug output. Bumping the timeout to 3
seconds is an actually important fix since we have seen mass storage
devices needing that much in the past.

BRANCH=None
BUG=None
TEST=Diffed payloads/libpayload/drivers/usb between chromeos-2013.04 and
chromeos-2015.07, confirmed that no serious differences remain.

Original-Change-Id: I03d865dbe536072d23374a49a0136e9f28568f8e
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290423
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I5d773d3a23683fb2164916cc046f4a711b8d259e
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11178
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:14:09 +02:00
Daisuke Nojiri 03e8188a3f cbfs: fix printf for 64bit architectures
BUG=none
BRANCH=smaug
TEST=Built for Smaug

Original-Change-Id: I7ff577f97252265ca6c96963ca44a6fbd0de9f7a
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290049
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-(cherry picked from commit 9cff308653766ea81978214e99a3d740aff4dbbe)
Original-Reviewed-on: https://chromium-review.googlesource.com/290116
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>

Change-Id: I5dcc17e0a42b46350fe6c398767f8155bdd0fd9d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: http://review.coreboot.org/11177
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:13:39 +02:00
Aaron Durbin e3260ec29a libpayload: usb: don't prematurely free the usb device
Before the controller's destroy_device() could interrogate
the usbdev_t object usb_detach_device() was freeing and
NULLing out the pointer. That results in all callers who
needed that object to start accessing random bits of memory.

This eventually led into free()ing memory it shouldn't which
corrupted the allocator's state. Eventually, all forward
progress was lost by way of a single ended linked list
turning into a circular list.

The culprit seems to be a bad merge in commit e00ba21.

BUG=chrome-os-partner:43419
BRANCH=None
TEST=Can boot into OS now w/o "hanging" on glados.

Original-Change-Id: I86dcaa1dbaf112ac6782e90dad40f0932f273a1f
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/290048
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

Change-Id: I9135eb0f798bf7dbeccc7a033c3f8471720a0de5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11173
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-13 16:34:09 +02:00
Paul Kocialkowski f1b7afb4a4 libpayload: Kconfig include in lpgcc
Payloads will include headers from libpayload, which depend on kconfig.h, so it
has to be included in the command line produced by lpgcc.

Change-Id: I3b55928babba2896a112f8c5fae46365cf71d308
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11114
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-10 20:29:07 +02:00
Patrick Georgi c983671f3d seabios integration: fix interaction with ccache
SeaBIOS' build system doesn't like CC to be a compound command like
"ccache gcc", so we strip things. Unfortunately with CCACHE enabled,
we passed /usr/bin/ccache (or wherever it was found on the PATH).
Instead use the second term in CCACHE mode.

Change-Id: I905fcdc73d067e553e923e307fafceaacdefdc6c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11138
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-10 18:10:21 +02:00
Patrick Georgi 7db6cef7fd libpayload: Fix compile error in time.c if nvram support is disabled
rdtsc() is only used for nvram access.

Change-Id: I896116d6a5782e5e50aa3acfbe1831b080f55d34
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11137
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-10 18:10:00 +02:00
Stefan Reinauer d0d487aaf4 payloads: Move payloads logic to payloads directory
Change-Id: I6437e30da6ab675d32dc81c5d6d3fd9bcdc67f06
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10923
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09 21:02:47 +02:00
Stefan Reinauer 2c6fe441a7 libpayload: Use CONFIG_LP_CCACHE instead of CONFIG_CCACHE
CONFIG_CCACHE was obsoleted a long time ago for libpayload.

Change-Id: Ib0a418d97f368439476e524b753160a6229bb9f6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10710
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09 21:02:37 +02:00
Patrick Georgi d7eb0cbf9a license headers: Drop FSF addresses again
Some FSF addresses found their way back into our tree.

Change-Id: I34b465fc78734d818eca1d6962a1e62bf9d6e7f3
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/11145
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-09 17:49:13 +02:00
Paul Kocialkowski 7572e66bc7 libpayload: lpgcc: CFLAGS and CMDLINE order inversion
When building an external payload with lpgcc, the provided cmdline needs to be
included before libpayload-specific CFLAGS so that the include priority is the
payload first. This way, a payload using e.g. Kconfig that declares a config.h
will have its config.h included first, instead of libpayload's config.h.

Change-Id: I19b8012623e04c92a427d74904aed7f3bf5f0996
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11113
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-09 13:07:04 +02:00
Paul Kocialkowski 5d5fcdd82b libpayload: .xcompile target is an actual file
Marking .xcompile as PHONY implies triggering the xcompile script each time make
is invoked. This is particularly problematic, especially when the script cannot
find the crossgcc toolchains on its own and has to be fed XGCCPATH.

Change-Id: Icb5ae82b210bca1ee9cf56d76130eefde481f81e
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11118
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-04 08:06:55 +02:00
Paul Kocialkowski 8d829bf2cd libpayload: Veyron configs unification
All the currently-provided configs for veyron boards are the same, so we might
as well have a common one that can be used on all boards.

Change-Id: I2e24f2d7a5206878381467b97f01d3e752a93289
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11115
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-04 08:06:45 +02:00
Paul Kocialkowski db0c0c4a60 libpayload: Allow for KBUILD_DEFCONFIG override
In order to specify a defconfig to libpayload, one might want to declare
KBUILD_DEFCONFIG in the make command line and run the defconfig target.

Change-Id: I2ade6f4ff2f0b6478a0831158028ebc79b5daa81
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: http://review.coreboot.org/11112
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-03 17:24:32 +02:00
Julius Werner bf697566da libpayload: lz4: Add output overrun check to incompressible case
The LZ4 decompressor currently doesn't check for output overruns before
writing data in the case where a block had been incompressible (and
included verbatim in the compression stream). This is extremely unlikely
with the default 4MB blocks, but still a nice thing to fix. We'll still
output as much data as we can before returning an error to support
partial decompression use cases.

This matches the behavior already in place for normal, LZ4-compressed
blocks where the decompression function is already (supposed to be)
doing complete bounds checking (although it is not guaranteed to output
all valid bytes before aborting on an output overrun, and you should try
to provide a few dozen bytes of extra buffer space beyond the parts
you're interested in on partial decompression).

BRANCH=None
BUG=chrome-os-partner:32184
TEST=None

Change-Id: I5e40c8cec8947ec0ec8f6d8c8fa2574cfb4dc958
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 636985334c9b3b93a12d4066d2829f1f999c9315
Original-Change-Id: Iecf44650aade60b9fa1b13e57da752fb482a3f3f
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/286240
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-07-21 21:27:42 +02:00
Julius Werner 752fba7846 libpayload: usb: Add support for SuperSpeed hubs
This patch adds support for the SuperSpeed half of USB 3.0 hubs, which
previously prevented SuperSpeed devices behind those hubs from working.

BRANCH=None
BUG=chrome-os-partner:39877
TEST=Played around with multiple hubs and devices on Oak and Falco, can
no longer find a combination that doesn't work.

Change-Id: I20815be95769e33d399b7ad91c3020687234e059
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3db96ece20d2304e7f6f6aa333cf114037c48a3e
Original-Change-Id: I2dd6c9c3607a24a7d78c308911e3d254d5f8d91d
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/284577
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: chunfeng yun <chunfeng.yun@mediatek.com>
Reviewed-on: http://review.coreboot.org/10958
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-18 09:40:48 +02:00