If a file "cmos.default", type "cmos default"(0xaa) is in CBFS,
a wrong checksum leads to coreboot rewriting the first 128 bytes
(except for clock data) with the data in cmos.default, then
reboots the system so every component of coreboot works with the
same set of values.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
It dumps everything you ask for, but you might not
get what you expect if the file is compressed or
otherwise converted (eg. payloads in SELF format).
(Originally it would only extract "raw" files.
This is a change by me, as filetypes are commonly used
to differentiate raw data files --Patrick)
Signed-off-by: Aurelien Guillaume <aurelien@iwi.me>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Tested on hardware by me.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add choice to use stable or master version of seabios repository
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Only skip probing if chip was found on the same port already to avoid
duplicates.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Hence drop the FALLBACK_ prefix
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5. Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.
Sample output:
Disabling memory access:
$ sudo setpci -s 6.0 0x04.b=0x0
$ sudo ./inteltool -m | head -n 9
Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
Intel Northbridge: 8086:2570 (i865)
Intel Southbridge: 8086:24d0 (ICH5)
============= MCHBAR ============
Access to BAR6 is currently disabled, attempting to enable.
Enabled successfully.
BAR6 = 0xfecf0000 (MEM)
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Update coreboot crossgcc toolchain, GDB 4.5.1, MPFR 3.0.0, GDB 7.2.
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Mostly done according to initial file creator.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
The datasheet is available on nuvoton's website.
http://www.nuvoton.com/NuvotonMOSS/Community/ProductInfo.aspx?
tp_GUID=cf73485c-9e0a-4218-9bee-89dfe9a7bb87
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Running result.
superiotool r6131
Found Winbond W83527HG (id=0xb0, rev=0x73) at 0x2e
The documentation is not available yet.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
broken them again. Instead rely on coreboot's dependencies to figure out
what to rebuild.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
DOTCONFIG make variable (defaults to .config).
Let abuild use that.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website available here:
http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf
This patch also seems to work for the F71889ED, which uses 0x09 and 0x09 for
chip ID bytes 1 & 2. However, I have not been able to find documentation to
verify that the two chips are identical from superiotool's perspective.
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- pmbase is on southbridge function 3 on I82371XX
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
then left in because USBDEBUG was actively worked on.
This isn't true anymore, so drop it
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
"make lint" should not stop after first failed test.
Improve "make lint" output.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
make lint users)
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
sequences.
Increase scanning speed.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This isn't hooked up anywhere, so won't affect anything, except for
developers trying to remove configuration #defines.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- via/epia-n/mptable.c
- intel/eagleheights/mptable.c (commented out anyway)
- asus/p2b-d/mptable.c
- asus/p2b-ds/mptable.c
Some files still incorrectly contain some smp_write_ioapic() lines from
the original mptable utility target (Supermicro P4DPE), which has one
IOAPIC in the southbridge (Intel ICH3-S), two IOAPICs contained in
the first P64H2, and two more in the second P64H2, i.e. 5 IOAPICs in total.
However, none of the boards where this chunk of code is present has
multiple IOAPICs (and even if they had, the PCI devices where those are
located would probably be different anyway), so drop the incorrect
mptable.c contents.
Also drop the lines from the mptable utility, so that future mptable.c files
don't incorrectly inherit any of this stuff.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
local ints. This is wrong in most coreboot mptables, probably all
generated by util/mptable/mptable.c.
After fixing this now XP can boot in MPS mode on my M2V.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- Drop sig[], oem[], and productid[] fields in all mptable.c files, no
longer needed. The sig[] is always the same ("PCMP"), the oem[] is
currently also always the same ("COREBOOT"), and productid is being
passed into mptable_init() directly as string now.
- LAPIC_ADDR is passed in as parameter, too. While at the moment it's
always the same value that is passed in, the LAPIC base address could
also be relocated theoretically, so keep it as parameter for now.
- Fix a few productid entries, they were (partially) incorrect:
- DK8S2 (was "DK8X", copypaste)
- 939A785GMH (was "MAHOGANY", copypaste)
- X6DHE-G (was "X6DHE", incomplete board name)
- H8DME-2 (was "H8DMR", copypaste)
- H8QME-2+ (was "H8QME", incomplete board name)
- X6DHE-G2 (was "X6DHE", incomplete board name)
- X6DHR-iG2 (was "X6DHR-iG", incomplete board name)
- GA-M57SLI-S4 (was "M57SLI", incomplete board name)
- KINO-780AM2 (was "KINO", incomplete board name)
- DL145 G1 (was "DL145G1", small fix as per vendor website)
- DL145 G3 (was "TREX", wrong board name)
- DL165 G6 (was "HP DL165 G6", drop vendor)
- S2912 (was "S2895", copypaste)
- VT8454c (was "VIA VT8454C", drop vendor, lower-case "c")
- EPIA-N (was "P4DPE", copypaste)
- pc2500e (was "PC2500", incorrect name)
- S1850 (was "S2850", copy-paste)
- MS-7135 (was "MS7135")
- MS-9282 (was "MS9282")
- MS-9185 (was "MS9185")
- MS-9652 (was "K9ND MS-9652")
- Ultra 40 (was "ultra40")
- E326 (was "E325", copypaste)
- M4A785-M (was "TILAPIA", copypaste)
- P2B-D (was "ASUS P2B-D", drop vendor)
- P2B-DS (was "ASUS P2B-DS", drop vendor)
- Adapt the mptable utility to use mptable_init() too.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
As both ioapic.h and acpi.h define a macro named "NMI", rename one
of them (NMI -> NMIType in acpi.h).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
The kernel initialization code as of boot protocol 2.10 is now reading the
kernel_alignment field. With the field left unset the kernel attempts to
align things to 4GB which is unlikely to work, so change the alignment to
the kernel's normal value of 16MB so newer kernels processed by mkelfImage
will boot.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Remove many more .c-includes from i945 based boards.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Long options of the form --opt=arg were not having the arg stripped
off into a another argument in the output. As a result, all long
options with args had to be written like "--opt arg" on the command
line to be recognized.
* The --remove option was shifting too many times.
As a bonus, I also added some logic to make "make distclean" cleanup
the default abuild build dir.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
statement to those files that actually need it. This significantly
reduces the number of dependencies, so it's no longer extremely ugly to
specify them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Patrick Georgi