Commit Graph

13698 Commits

Author SHA1 Message Date
Matt DeVillier 3905caec32 dmp/vortex86: fix missing cpu Kconfig guards
Commit e2c2bb9 (dmp/vortex86: move PLL config to cpu Kconfig)
failed to properly restrict the PLL config selection to that cpu,
resulting in the selection option being present/required for all CPUs.

Fix by guarding the Kconfig options with if/endif.

Change-Id: Ifecf291b985ab9d0d13d6b1264d3bc9a314b8546
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: http://review.coreboot.org/10038
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-30 22:33:16 +02:00
Lee Leahy c95ebccd9a vendorcode/intel: Add EDK2 header files
As the first step in adding support for FSP 1.1, add common header files
for EDK2.  Internally FSP is based upon EDK2 and uses the defines and
data structures within these files for its interface.

These files come from revision 16227 of the open source EDK2 tree at
https://svn.code.sf.net/p/edk2/code/trunk/edk2.  These files are
provided in an EDK2 style tree to allow direct comparison with the EDK2
tree.

Updates may be done manually to these files but only to support FSP 1.1
on UEFI 2.4.  A uefi_2.5 tree should be added in the future as FSP
binaries migrate to UEFI 2.5.

Note: All the files were modified to use Linux line termination.

BRANCH=none
BUG=None
TEST=Build for Braswell or Skylake boards using FSP 1.1.

Change-Id: Ide5684b7eb6392e12f9f2f24215f5370c2d47c70
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/9943
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 22:28:12 +02:00
Patrick Georgi 405bd698a6 intel/broadwell: Allow using non-fake IFD descriptor
Change-Id: I3091437444ffd9ca3e103c41c37a5374805b1231
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10045
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-04-30 22:11:53 +02:00
Matt DeVillier 31769d99da cpu/intel/haswell: remove dependency on socket_rpga989
Remove dependency of Haswell on cpu/intel/socket_rpga989 code,
which is a carry-over from Sandy Bridge/Ivy Bridge and older
coreboot conventions where features were structured around socket types.

Add CPU-specific options to Kconfig and required subdirs to
Makefile.inc which are curently included with socket_rpga989.

TEST=successfully built and booted on google/panther

Change-Id: Ic788e2928df107d11ea2d2eca7613490aaed395c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: http://review.coreboot.org/10037
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 17:50:47 +02:00
Patrick Georgi 40e2004abf intel/broadwell: bootstate mechanism only exists in ramstage
So don't try to use it elsewhere.

Change-Id: Ia600ba654bde36d3ea8a0f3185afae00fe50bfe9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10030
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 16:57:19 +02:00
Patrick Georgi c41fd4b75c arm/armv7: drop merge left-over
Fixes up commit 93d8e3c4 (armv7-m: add armv7-m configuration).

Change-Id: Ie0b6c90e9ce89d564e3345d2746297f39ba9121d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10042
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 16:15:15 +02:00
Patrick Georgi 27ef602fab vboot: split class in library and stage
The build system includes a bunch of files into verstage that
also exist in romstage - generic drivers etc.
These create link time conflicts when trying to link both the
verstage copy and romstage copy together in a combined configuration,
so separate "stage" parts (that allow things to run) from "library" parts
(that contain the vboot specifics).

Change-Id: Ieed910fcd642693e5e89e55f3e6801887d94462f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10041
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:39:53 +02:00
Patrick Georgi 8ef8afbb38 arch/arm: only include subdirectories for ARM builds
Change-Id: Ieac02fcc4508f7c1b194802453d6222b902a38a2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10032
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:39:29 +02:00
Patrick Georgi b5e1984594 intel/broadwell: Don't select MONOTONIC_TIMER_MSR
That's a Haswell exclusive, used nowhere else, but confusing
when hunting for the monotonic timer used on that SoC.

Change-Id: I60ec523e54e5af0d2a418bcb9145de452a3a4ea9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10034
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:39:10 +02:00
Patrick Georgi e3f880e4d8 intel/broadwell: Build monotonic timer driver for SMM
SPI flash drivers need it.

Change-Id: I63d79472d70d75f7907e7620755c228d5a4918e1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10033
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:39:04 +02:00
Patrick Georgi fd5ed6b7ad build system: Drop another vboot1 remnant
The vboot stage is now done totally different,
as a real stage, and handled in the right location
(src/vendorcode/google/chromeos/vboot2/Makefile.inc),
so drop this vboot1 file.

Change-Id: Ie9a4ae257c2702ddcd217f5b4ef8d8f22b5099f4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10040
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:38:46 +02:00
Patrick Georgi ba2b1e32b0 i2c/tpm: add final newline
Change-Id: I0024c4d56f93eb6c9a54103e79c9d8a8b7d8d6fb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10043
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:37:55 +02:00
Patrick Georgi e360df0fe2 chromeos: Use __attribute__ normal form
Change-Id: Idf99c1491386578ac2471ca5cc8a153d2b5225e4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10044
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:37:42 +02:00
Patrick Georgi 3e18acabd3 chromeos: Add missing headers
Builds with CHROMEOS fail due to missing includes.

Change-Id: I8c88bca8f8cc3247d3f3311777f794c4fdfee3c1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10029
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 15:37:21 +02:00
Aaron Durbin 57e37287f4 vboot: add and rejuggle Kconfig options
The ChromeOS machines employing vboot verfication require
different combinations of support:

1. When vboot verification starts.
2. Is the vboot code a separate stage or program?
3. If a separate stage, does the that vboot program (verstage) return
   to the stage that loaded the verstage?

For the above, #1 is dependent on when to load/run vboot logic which
is orthogonal to #2. However, #3 is dependent on #2. The logic
to act on the combinations follows in subsequent patches.

Change-Id: I39ef7a7c2858e7de43aa99c38121e85a57f1f2f6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10024
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 13:05:36 +02:00
Aaron Durbin 5abcba7121 vboot: move Kconfig options for stage indicies
With vboot1 out of the way place all the associated Kconfig
options in vboot2's Kconfig file (excluding main vboot verify
option). More options will be added to accomodate vboot's various
combinations of use cases.

Change-Id: I17b06d741a36a5e2fefb2757651a61bfed61ae1e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10023
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-04-30 13:05:20 +02:00
Aaron Durbin 5e8286bed6 program loading: add optional is_loader_active() callback
Add a way for a loader to indicate if it is active. Such users
of this callback would be vboot which can indicate to the rest
of the system that it isn't active. is_loader_active() also
gives vboot a chance to perform the necessary work to make
said decision.

Change-Id: I6679ac75b19bb1bfff9c2b709da5591986f752ff
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10022
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 13:05:13 +02:00
Denis 'GNUtoo' Carikli 16110e7ffa i945/gma: Fix wrong comment about the documentation.
The GTT location is documented in the "309219" datasheet.
For instance it can be found in the TOLUD register description.

The 309219 datasheet is for the
"Mobile Intel® 945 Express Chipset Family". It was published in 2008.

Change-Id: I75ac095ebc577e031af566963ebffe9ed2587c96
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/9622
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 12:01:43 +02:00
Stefan Reinauer 9616f3ceb7 kbuild: Don't require intel/common changes for every soc
In the true spirit of separating components more strictly
and allowing to add new components to coreboot without touching
existing code, move Intel common code selection to the soc
Kconfig and out of src/soc/intel/common/Makefile.inc

Change-Id: I0a70656bb9f4550b6088e9f45e68b5106c0eb9af
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10031
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 12:00:14 +02:00
Patrick Georgi ae5ab604d5 crossgcc: improve error message on missing tools
People were confused about the 'missing toolchain', so
improve the error message.

Change-Id: Icaee338aeedce2255bcfdafe5407c9df02ad9c4a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10036
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2015-04-30 04:12:19 +02:00
Lee Leahy b8179087af cbmem: Add FSP timestamps
Add additional FSP timestamp values to cbmem.h and specify values for
the existing ones.  Update cbmem.c with the FSP timestamp values and
descriptions.

BRANCH=none
BUG=None
TEST=Build for Braswell and Skylake boards using FSP 1.1.

Change-Id: I835bb090ff5877a108e48cb60f8e80260773771b
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10025
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-30 01:33:10 +02:00
Lee Leahy bdd98254ab cbmem: Identify the FSP areas in CBMEM
Add identifers and descriptions for the FSP areas within CBMEM.

BRANCH=none
BUG=None
TEST=Build for Braswell and Skylake boards using FSP 1.1.

Change-Id: I4d58f7f08cfbc17f3aef261c835b92d8d65f6622
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10026
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-30 00:18:46 +02:00
Patrick Georgi 6e944c467c imgtech/pistachio: Give some more space to the bootblock
The memory layout isn't very clear here, since there are two
regions (bootblock and "SRAM") that are actually the same.
So when increasing the bootblock's size, we also need to move
the romstage around.

Change-Id: Ib158a4ef96b7c1dd1132b6e8bd47a0eb9c3951d9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10035
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-04-30 00:17:00 +02:00
Stefan Reinauer e1133b7d7d kbuild: automatically include northbridges
This change switches all northbridge vendors and southbridges
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in northbridge/Makefile.inc or in
northbridge/<vendor>/Makefile.inc.

This means, vendor and northbridge directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).

Change-Id: I8468154dbfaaaffcba9fda27ba2d7b9049ad5c19
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9800
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-29 18:12:14 +02:00
Stefan Reinauer aae53ab76a kbuild: automatically include SOCs
This change switches all SOC vendors and southbridges
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in soc/Makefile.inc or in
soc/<vendor>/Makefile.inc.

This means, vendor and SOC directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).

Change-Id: Iede26fe184b09c53cec23a545d04953701cbc41d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9799
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-29 18:11:30 +02:00
Stefan Reinauer 77c04e95ba kbuild: automatically include ECs
This change switches all ECs and the generic EC ACPI code
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in ec/Makefile.inc or in
ec/<vendor>/Makefile.inc.

This means, vendor and ec directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).

Change-Id: I29d757d1f8c10a1d0167a76fd0d0f97bac576f6d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9798
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-29 18:10:41 +02:00
Martin Roth e2c2bb9447 dmp/vortex86: move PLL config to cpu Kconfig
This moves the vortex86ex cpu's pll configuration out of the mainboard
and into the cpu's Kconfig.

Change-Id: I72ee1baa3a96586fceff03ff43c5f61e2498667e
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/9058
Tested-by: build bot (Jenkins)
Reviewed-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-29 17:36:24 +02:00
Kyösti Mälkki f20046f5cf mainboard/intel: Drop unused onboard.h files
Change-Id: I0851375f419202f62ddc8c80fa77e1d8c95ed50f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/9991
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-29 16:57:12 +02:00
Idwer Vollering 1b7c9590f4 crossgcc: don't use libdl while building GDB on FreeBSD
Since FreeBSD doesn't have libdl, these errors are shown:
- config.log: /usr/bin/ld: cannot find -ldl
- crossgcc-build.log: configure: error: C compiler cannot create executables

Conditionally pass the presence of libdl in LDFLAGS.

Change-Id: I79c48da7e6700a4606c9e0c1314241db8997d3f3
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/2342
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-29 14:42:37 +02:00
Patrick Georgi 815f4bfbbd Use __ROMSTAGE__ to denote romstage
There were some remaining places that used __PRE_RAM__ for
romstage, while it really means 'bootblock or romstage'.

Change-Id: Id9ba0486ee56ea4a27425d826a9256cc20f5b518
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10020
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-04-29 07:24:26 +02:00
Patrick Georgi cc8171f005 rules.h: add verstage macro
Change-Id: I5ba32e80a825a1f86d0e32da23e5fa0a2d85f4cd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10019
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-04-29 07:23:40 +02:00
Lee Leahy 913dbbcb3a vendorcode/intel: Add FSP 1.1 header files
The second step in adding support for FSP 1.1 is to add the header
files.

Updates may be done manually to these files but only to support FSP 1.1.
An FSPx_y tree should be added in the future as FSP binaries migrate
to new FSP specifications.

The files are provided in an EDK2 style tree to allow direct comparison
with the EDK2 tree.

BRANCH=none
BUG=None
TEST=Build for Braswell or Skylake boards using FSP 1.1.

Change-Id: If0e2fbe3cf9d39b18009552af5c861eff24043a0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/9974
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-29 01:46:53 +02:00
Patrick Georgi f394715277 gitconfig: Use the right make executable in git hooks
When installing git hooks through $(MAKE) gitconfig,
make knows itself (and is a GNU make). So let it splice
itself into hooks where necessary by replacing %MAKE%.

Change-Id: Iaf778bfa3f17a8fe31312f871571ed89a9de5385
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10018
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-28 22:49:16 +02:00
Patrick Georgi 7cb26b4a6e buildgcc: OpenBSD's tar and patch are sufficient, too
No need to enforce GNU versions for them.

Change-Id: Ieeb43298331fbefbcc1e230d41a90e9df56993eb
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10017
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-28 22:49:13 +02:00
Patrick Georgi f60fc82ae9 board-status: Improve revision URL collection
It now assumes that origin points to the official repo (while there may
be more) and doesn't assume anymore that there's a user ID that needs to
be pruned (although it is, if present).

Change-Id: Id4c5ee2cb7c08e997eaba1c750097a2e2bf51af5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 22:13:47 +02:00
Patrick Georgi cccc9d4087 cbfstool: compare pointer difference with ptrdiff_t value
Fixes building cbfstool in 32bit environments.

Change-Id: I3c94afc9c961eb8b41d1e08f4a16e5cab2a6bb8b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/10015
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 22:13:24 +02:00
Martin Roth 595e7777e7 Kconfig whitespace fixes
trivial whitespace fixes.  Mostly changing leading spaces to tabs.

Change-Id: I0bdfe2059b90725e64adfc0bdde785b4e406969d
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10000
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 21:14:56 +02:00
Martin Roth 562d6f30a0 fsp platforms: consolidate FspNotify calls
Consolidate the FspNotify calls into the FSP driver directory,
using BOOT_STATE_INIT_ENTRY to set up the call times.

Change-Id: I184ab234ebb9dcdeb8eece1537c12d03f227c25e
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/9780
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 20:50:03 +02:00
Martin Roth ceae968e2c Fix some minor Kconfig issues
- Remove Kconfig files that are no longer used:
    src/vencorcode/Kconfig
    src/soc/marvell/Kconfig
- Fix the drivers/sil/Kconfig to point to drivers/sil/3114 which had
the same code.
- Make sure all Kconfig files have linefeeds at the end. This can cause
problems, although it wasn't in this case.
- Include cpu/intel/model_65x/Kconfig which was not being included.

Change-Id: Ia57a1e0433e302fa9be557525dc966cae57059c9
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/9998
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 20:49:12 +02:00
Kyösti Mälkki e2edf71204 Makefile x86 SMM: Move smm_wrap recipes
This is not used together with SMM_MODULES.

Change-Id: I52621787cfa5a9e3863c150ce64f62aceb423eb4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10014
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28 18:08:45 +02:00
Aaron Durbin 804c13982a arm: guard verstage rules
Do not unconditially supply verstage rules for all
platforms.

Change-Id: Ic0713350aa21a9966fca828211750d25c2b6b71d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9969
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28 18:06:45 +02:00
Aaron Durbin 6f5b18c03b vboot: remove vboot_helper.c
This file was moved previously to get it out of the way
for easier merging from the chromium repo. It's not used
currently so remove it.

Change-Id: I8e691623f29ac2218b83bc46f5b4a348e0e1b3ef
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9960
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-28 16:10:40 +02:00
Aaron Durbin be3e0a04b5 boards: remove VBOOT_(REFCODE|RAMSTAGE|ROMSTAGE)_INDEX
These options will need to just be selected in within
the .config files. There's not need in duplicating all
these options.

Change-Id: I7b670bc59a3b35e39eee4faecaf4aa779d47a3bb
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9959
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28 16:10:18 +02:00
Aaron Durbin 1124cec59a chromeos: remove VBOOT2_VERIFY_FIRMWARE option
There's no need to have the VBOOT2_VERIFY_FIRMWARE
distinction because it's the only game in town.

Change-Id: I82aab665934c27829e1a04115bf499ae527a91aa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9958
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28 16:09:56 +02:00
Aaron Durbin 6d65f796db vboot: remove vboot1
In preparation for moving to vboot2 for all verified
boot paths bring over Kconfig options to the common
area from vboot1. Also remove vboot1 directory entirely.

Change-Id: Iccc4b570216f834886618f0ba5f2e1dd6c01db4b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9957
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28 11:11:05 +02:00
Daisuke Nojiri 599c32d8ef marvell/bg4cd: merge verstage into bootblock
If verified boot is enabled, merge verstage into bootblock. This also
requires custom bootblock code to actually call into verstage.
[pg: modified to match upstream]

BUG=chrome-os-partner:32631
BRANCH=ToT
TEST=booted on cosmos development board.

Change-Id: I53251aac966ee15da24232c23fefa636de8b253b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2b8ada263017b46afa755b5acb759574184dba06
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: Ia0e1236357aa32bf553fb8cc98f3a8d29de17f45
Original-Reviewed-on: https://chromium-review.googlesource.com/229795
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10008
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 10:20:42 +02:00
Patrick Georgi efc6aa0eb9 vboot2: Allow merging verstage into bootblock
Change-Id: I31cd7f84db8b7176c8854f33421aab5c176cd5ce
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10007
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 10:20:35 +02:00
Patrick Georgi 8f2b0dc16b vboot2: Always enable timestamps
The vboot2 code requires them.

Change-Id: I9afaf9b373297b0eebce9ffd7cc05766dee7d6fd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10006
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 10:20:25 +02:00
Patrick Georgi 66cdba7ea5 vboot2: get rid of global variable that is used locally and only once
Change-Id: Iaf6d6a8857451fb16916aaae97a6fd5c51bc8cc4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10005
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 10:20:16 +02:00
Patrick Georgi ba80887cfd vboot2: Build verstage archive, then use that for building the stage
This slightly streamlines integrating the vboot2 library and
prepares for merging verstage and bootblock on selected devices.

Change-Id: I2163d1411d0c0c6bf80bce64796e1b6a5a02b802
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10004
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 10:20:05 +02:00