Commit Graph

10646 Commits

Author SHA1 Message Date
Kyösti Mälkki 53584fa32f AMD get_bus_conf(): Drop bus_type array
Only ever used as lvalue, so no point creating the array.

Change-Id: I6699dfae9377a895e9bc4a52579d00ddcfa60a9f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6277
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-07-17 21:48:12 +02:00
Edward O'Callaghan c4561e24bb drivers/spi: Sanitize headers from preprocessor abuse
Continuing on from the rational given in:

a173a62 Remove guarding #includes by CONFIG_FOO combinations

Change-Id: I35c636ee7c0b106323b3e4b90629f7262750f8bd
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6114
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-17 20:21:30 +02:00
Paul Menzel 0017c6ee87 intel/lynxpoint/Kconfig: Remove duplicate option `IFD_BIN_PATH`
Currently `IFD_BIN_PATH` is shown twice. Commit 5218e616
(intel/lynxpoint: Allow building without IFD (descripter.bin)) [1]
accidentally added the option another time.

So fix up the commit and remove one of the two options `IFD_BIN_PATH`.
Keep the one which depends on `!HAVE_IFD_BIN` and is around the IFD
options.

[1] http://review.coreboot.org/6046

Change-Id: Id46f01ab8ee2e752e337e687a2ef0dfa374f44a5
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/6269
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-17 10:16:42 +02:00
Edward O'Callaghan 0ff347129c mainboard,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I6a95debbe86fddcaf94270dd380bc73ce3172e58
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6283
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:21:02 +02:00
Edward O'Callaghan e6d4732c41 northbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: Id1fcd3d1cd8a156a76e1a9a3ca4c7b4004c2c015
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6289
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:20:39 +02:00
Edward O'Callaghan 3c41876e71 southbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: Ied03e8814ea13f0e677a1d34da19efe6dfebf72f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6288
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:20:27 +02:00
Edward O'Callaghan dc112e3515 cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I7e8866d76d7f286e10160d7dc4f21f01a913bfee
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6286
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:20:12 +02:00
Edward O'Callaghan 29794b7ad7 device,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I73fe6f37c363f4bff332ca90178a236590067170
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6287
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:19:57 +02:00
Edward O'Callaghan 4fc32be152 drivers,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I2d1f6a571166924c929452fd0f70192670904220
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6285
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:19:46 +02:00
Edward O'Callaghan a47ab1be12 soc,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I6db4eada5be5f9a4340d9edb942924e2fd18b5ca
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6284
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:19:30 +02:00
Edward O'Callaghan ff9e45e0b2 superio,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: Ia452e22af9491c1681c859691eb4ac1868eeb938
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6282
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:19:14 +02:00
Edward O'Callaghan 52f7043024 mainboard,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: Ib531a54db7df6b49a6218f689dcaab712e9dfb01
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6292
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:18:23 +02:00
Edward O'Callaghan 4202f5d3b3 misc,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: I5060052e268c6a6303d77fdf4380a55ac2ad5ae2
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6296
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:18:01 +02:00
Edward O'Callaghan 398bb14294 soc,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: If70f5ad26d639d7366772f4468a25bca83ac0857
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6295
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:17:43 +02:00
Edward O'Callaghan c1b1c8e9b3 northbridge,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: I8d4bf17fe9fd82499b1515a8e85dff9cba498350
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6294
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:17:30 +02:00
Edward O'Callaghan 5eb4d6327e southbridge,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: I8ef5f1571ad14ead2d4cc0d61b6b7133d7fc8550
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6293
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:17:01 +02:00
Paul Menzel daf9e50ac1 intel/i945/raminit.c: Remove trailing whitespace from `printk()`
Remove a trailing space after the ellipse in the debug messages.

	Setting Graphics Frequency...
	FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz

Change-Id: Iac8a5e89179104685dc54975ae7f833c1f3de69d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/6280
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-16 17:35:25 +02:00
Edward O'Callaghan ff7e676c9f superio/fintek/f71869ad: config struct should be const qualified
The 'superio_fintek_f71869ad_config' struct packed by devicetree.cb
should have its type declared with the 'const' qualifier.

Change-Id: Ieb86861ee821e77680cc4d0de202dbd7535b844d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6224
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-15 20:49:03 +02:00
Edward O'Callaghan 152e517877 southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fix
Change-Id: I5b6d0a1f5f96a8d6cfc5a14baaa0f9267339b072
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6268
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-15 15:42:35 +02:00
Edward O'Callaghan 8f3de28af3 drivers/intel/fsp/fsp_util: 'long unsigned int' is 'unsigned long'
This is a bit of strange way to write 'unsigned long', fix that.

Change-Id: I17caf971dac840e0f35f883dacfbd5c94d8c03d6
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6196
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-15 15:20:18 +02:00
Patrick Georgi 913e1718cd build system: fix another cbfstool race
It just doesn't work to have files depend on their parent
directory: As soon as the files are written, the time stamp
of the directory changes, too.

This led to spurious updates of cbfstool and rmodtool, and
related "permission denied" errors when linker and build
system ran into each other.

Change-Id: I44a7d7b4b1d47a1567ece1f57dfd6745d05ee651
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6276
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-15 14:27:04 +02:00
Patrick Georgi 18ff4f166b build system: create .xcompile dependency
It's probably safe to say that .xcompile needs an update if
util/xcompile/xcompile changed, so tell make about this
dependency.

Updates are honored immediately due to GNU make's feature of
reinterpreting everything when an included file changes.  See "How
Makefiles Are Remade" in the GNU make documentation for details.

Change-Id: Ide2f028eaddcee66028c6403688cc83e1622fa6b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6255
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-15 12:26:43 +02:00
Daniele Forsi 3bb0b7230c util/xcompile: Print fatal error messages to stderr instead of stdout
This uses die() which was previously unused.
Before this change an unhelpful error message was printed when make tried
to parse English text as if it was part of the makefile:
.xcompile:1: *** missing separator (did you mean TAB instead of 8 spaces?).  Stop.

After this change the first error message at least mentions that iasl is
missing:
ERROR: no iasl found
make: -print-libgcc-file-name: Command not found
make: -print-libgcc-file-name: Command not found
make: -print-libgcc-file-name: Command not found
/bin/sh: 0: Illegal option -
Makefile.inc:36: *** Please use the coreboot toolchain (or prove that your toolchain works).  Stop.

Change-Id: I79d5de5993e3828460130192df376daa55f32aa0
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6272
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-15 11:03:36 +02:00
Martin Roth be5340bad2 board_status.sh add non-fatal test_cmd
- add a non-fatal option to test_cmd.

Change-Id: If74693ea7ec8ea24104d5836e4c24bfb135ef0e1
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6257
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-07-15 03:04:31 +02:00
Kyösti Mälkki 2fa8cc35a8 AGESA hudson: Fix SPI writes
Only yangtze has longer FIFO in SPI controller. This was overlooked
in commit

   9f0a2be AMD SPI: Optimise for longer writes

which broke SPI writes and caused CBFS errors with fam15tn.

Change-Id: I821e3f1fa186d2383b30eab9c5d52797c2ef22c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6273
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-15 01:56:09 +02:00
Kyösti Mälkki dfad070831 AGESA Hudson: Fix typecasts in Fch_Oem_config()
Like many other (but not all) BiosCallouts, StdHeader is also passed
as ConfigPtr argument. Use that instead to make no assumptions of the
real type of FchData as it changes depending of the StdHeader.

Change-Id: Ibdf01d08e63b9e1b8e99ac16abb7f807d37a056e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6240
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:51:16 +02:00
Kyösti Mälkki 37ab729ec3 AGESA boards: Use IS_ENABLED() for HUDSON_LEGACY_FREE
Change-Id: Ib2a015dac82cec8538f8b1a1c2d45b20b05747bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6239
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-14 19:49:57 +02:00
Kyösti Mälkki d005f78d29 AGESA fam15: Fix entry to cimx/sb900
Move SB900 call to match comments and changes already made for
family14 et al.

Change-Id: I22aa0bbeeabf9cff929c49c23014005bc3d53ccb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6238
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:49:32 +02:00
Kyösti Mälkki b6f3da4ddc AGESA CIMx: Move late init out of get_bus_conf()
Followup deals further with Fam15 case. For unknown reasons calls
were commented out for amd/dinar and they remain that way.

Change-Id: Ie0a25fbb6f5378019fbf0f19a02acf024d79817e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6237
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:48:51 +02:00
Kyösti Mälkki 232ae17718 AGESA fam12: Fix entry to cimx/sb700
Move SB700 calls to match comments and changes already made for
family14 et al.

Change-Id: I20a84e487ba346f63dd4454447077e0d2fd12c89
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6222
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:48:29 +02:00
Kyösti Mälkki 7b23ae0e89 AGESA: Trace execution with AGESAWRAPPER()
Implement logging just once to have uniform output.

Change-Id: I8db694a3bf6b1af459bdf98f7acb99edf4dd07f7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6180
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:48:00 +02:00
Edward O'Callaghan 06ff7268f6 AGESA: Fix error status code return type to enum from UINT32
AGESA correctly uses the enum AGESA_STATUS type whereas boards use a
mess of UINT32 typecasts.

Also no need to shout VOID. We are not that careful on changing
all cases of VOID->void or whitespace issues as these files will
get merged with follow-ups.

Change-Id: I16ccfcc73cda6b917c7ff5fd42ee2cd04e7dc0dd
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6182
Tested-by: build bot (Jenkins)
2014-07-14 19:47:25 +02:00
Kyösti Mälkki 9f0a2be165 AMD SPI: Optimise for longer writes
Leave it to the implementation of flash->write() to split the writes
to match SPI controller and SPI flash part restrictions. This allows
for some optimisation for auto-address-increment (AAI) commands.

Kconfig AMD_SB_SPI_TX_LEN can be kept as local.

Change-Id: I4a8bc55ab7eb0eeda8f25003a8f5ff2a643ab7a7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6164
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:43:03 +02:00
Kyösti Mälkki 1110495de9 SPI: Split writes using spi_crop_chunk()
SPI controllers in Intel and AMD bridges have a slightly different
restriction on how long transactions they can handle.

Change-Id: I3d149d4b7e7e9633482a153d5e380a86c553d871
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6163
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:42:49 +02:00
Kyösti Mälkki 77d1280d0c SPI flash: Fix alignment checks in Page Program commands
There are two separate restrictions to take into account:

  Page Program command must not cross address boundaries defined by the
  flash part's page size.

  Total number of bytes for any command sent to flash part is restricted
  by the SPI controller capabilities.

Consider

  CONTROLLER_PAGE_LIMIT=64, page_size=256, offset=62, len=4.
  This write would be split at offset 64 for no reason.

Consider

  CONTROLLER_PAGE_LIMIT=40, page_size=256, offset=254, len=4.
  This write would not be split at page boundary as required.

We do not really hit the second case. Nevertheless, CONTROLLER_PAGE_LIMIT
is a misnomer for the maximum payload length supported by the SPI controller
and is removed in a followup.

Change-Id: I727f2e7de86a91b6a509460ff1f374acd006a0bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6162
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:42:27 +02:00
Luigi Semenzato 562db3bb3f libpayload: find source of input characters
This change makes it possible for vboot to avoid an
exploit that could cause involuntary switch to dev mode.
It gives depthcharge/vboot some information on the
type of input device that generated a key.

BUG=chrome-os-partner:21729
TEST=manually tested for panther
BRANCH=none
CQ-DEPEND=CL:182420,CL:182241,CL:182946

Change-Id: I87bdac34bfc50f3adb0b35a2c57a8f95f4fbc35b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/182357
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
Tested-by: Luigi Semenzato <semenzato@chromium.org>
Commit-Queue: Luigi Semenzato <semenzato@chromium.org>
Reviewed-on: http://review.coreboot.org/6003
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:19:14 +02:00
Matt DeVillier f4d1f3a4d9 google/panther: adjust critical temp
Set critical temp to match newer devices

Change-Id: I11f32297a9b8c9a3554821b5d1cd723d8d9e2b69
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: http://review.coreboot.org/6023
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:17:48 +02:00
Stefan Reinauer 4923c399f3 google/panther: Force enable ASPM on PCIe Root Port 4
BUG=chrome-os-partner:21535
BUG=chrome-os-partner:25990
BRANCH=panther
TEST=manual: Boot on Panther and look in /sys/firmware/log for
the string "PCIe Root Port 4 ASPM is enabled"

Change-Id: I294571c113a8909adb2e97afca92aef9a1af917c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187153
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6007
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:17:03 +02:00
Stefan Reinauer c63ad997a5 google/panther: acpi: Fix unstable fan behavior on boot + resume
FLVL is used to keep track of which thermal zones are active, but it is
not initialized upon boot / resume. An initial value of zero corresponds
to all zones being active, which causes the fan to spin at max speed
until the OS changes zones. Fix this annoyance by initializing FLVL to
the lowest temperature zone.

Also, fix a related bug where FLVL may jump to an undesired value. For
example, if FLVL=3 (zones 3 + 4 active), and zone 0 is set to off (it's
already off!), FLVL would previously become 1 (zones 1 + 2 + 3 + 4
active!). Fix this by not taking zone ON / OFF actions if our zone is
already ON / OFF.

BUG=chrome-os-partner:25766, chrome-os-partner:24775
TEST=Suspend / resume on Panther 20 times, verify that thermal zone after
resume matches expectation based upon temperature. Also, stress system
and verify thermal zones become active according to temperature
increase.

Change-Id: Ic60686aa5a67bf40c17497832b086ba09d56111a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186455
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186669
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6006
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:17:01 +02:00
Stefan Reinauer 123fa68987 google/panther: Fix RW ramstage index
Without this patch coreboot will always use the read-only version
of ramstage, even if there is a read-write version available.

BRANCH=panther
BUG=chrome-os-partner:25870
TEST=Install different RO and RW version, check in cbmem log that
     coreboot's romstage and ramstage have different timestamps
     in their banners.

Change-Id: I723a3d4479d59534660728d891a9f40a077b4ef0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186664
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/6005
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:17:00 +02:00
Mohammed Habibulla 3d24edab2c google/panther: Add new thermal values
Based on latest thermal report

BUG=chrome-os-partner:24532
TEST=boot tested on panther
BRANCH=panther

Change-Id: I4b8639f926fc3cf57eb5329818b9b912bfbe222d
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186113
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6004
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:59 +02:00
Stefan Reinauer 9b43edf36c google/panther: Avoid shutdown when thermal sensor is unavailable
When the thermal sensor on Panther is unavailable (early on resume)
it will return 0x80 which causes our AML thermal code to overflow,
which causes the system to shut down. Instead, return a reasonable
value in those cases so that the system will continue running until
the sensor gets back on its feet.

BUG=chrome-os-partner:24918
BRANCH=panther
TEST=suspend_resume_test survived more than 100 iterations on Panther

Change-Id: Ib2d714c39d353ce2415361bc6590784a3f6837d2
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182369
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6002
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:58 +02:00
Stefan Reinauer a0819eb38d google/panther: Re-read temperature if current reading would cause power-off
Sometimes the SuperIO seems to provide wrong readings, especially early
on after a resume from suspend. This will cause the system to power off.
If that happens, wait for 1s and read again, to make sure the high
temperature value was not just a flaky read.

BUG=chrome-os-partner:24918
BRANCH=panther
TEST=Boot tested on Panther.

Change-Id: Ib3768528d90e34448e96ad587b2503d8d8b1a775
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182188
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6001
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:56 +02:00
Stefan Reinauer 06946cabd9 google/panther: Disconnect speaker and mic in verb table
There is no speaker and no builtin microphone in this system,
hence disable them in the verb table.

BRANCH=panther
BUG=chrome-os-partner:24230
TEST=Boot Panther, see Microphone and Speaker disappear
     in Audio Settings

Change-Id: I32bacec38ba3ba0c2359a8fc94e12af64f576012
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182006
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/6000
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:55 +02:00
Stefan Reinauer a0eeba47a1 google/panther: Disable DEVSLP for SATA
Some SSD modules don't support DEVSLP correctly due to their
firmware. Since the power savings are minimal, don't use
DEVSLP to prevent potential problems. Some of the symptoms
are that sometimes this causes USB devices to not work properly.

BUG=chrome-os-partner:23186,
BRANCH=panther
TEST=Boot tested on Panther

Change-Id: Iba3f721c73e0e760b6a9861ca23480ddb923df40
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181957
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5999
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:54 +02:00
Stefan Reinauer 1abeef6005 google/panther: Add ACPI code to support wake-on-lan
There needs to be an ACPI linkage to provide the power resource
needed to wake this device so the kernel will enable the SCI
before going to suspend.

A link is added for both NIC and WLAN, but it is only tested
on the NIC.

This is a forward port from Duncan's beltino patch.

BUG=chrome-os-partner:24657
BRANCH=panther
TEST=build and boot on panther, suspend and wake with etherwake

Change-Id: I2804d2e904e26d6e34f5a177f0dabc1aaa3f0288
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181752
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/5998
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:53 +02:00
Stefan Reinauer 84570d6c5b google/panther: Update Fan Policy
Update fan policy according to Panther thermal report.

CPU Temp. Readings | PWM
-------------------+------
 40C               |  42%
 50C               |  42%
 83C               |  80%
 90C               |  90%
 96C               | 100%

BUG=chrome-os-partner:24532
BRANCH=panther
TEST=boot tested on Panther

Change-Id: I60f04d8b038c561b87dad505bbf058100119cc23
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181666
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/5997
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:52 +02:00
Stefan Reinauer a3f061bf22 google/panther: Disable power-failure gating for the PSON# signal
When the system loses AC power, the system will power back on
automatically as soon as the AC power is reapplied.

BUG=chrome-os-partner:24066
BRANCH=firmware-panther-4920.24.B
TEST=boot tested on panther

Change-Id: I37ddc5a162afcce01c2df5f509bfd7f2d0c15ba1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179537
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/5996
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:51 +02:00
Mohammed Habibulla e9b6155e46 google/panther: Configure USB_ILIM_SEL to low
(panther port of Ib980100c648ae7472eac6f97e47f8ef3cbe72c7e)

BUG=none
BRANCH=none
TEST=boot tested on Panther

Change-Id: Iedcc107a43be170762d42d515c7e2a16ec395452
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/177474
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@google.com>
Tested-by: Mohammed Habibulla <moch@google.com>
Reviewed-on: http://review.coreboot.org/5995
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:49 +02:00
Mohammed Habibulla d2259dd3a1 google/panther: Set default interrupt value for Environmental Controller
This writes the default value to the register, but it gets rid of
the error that disturbs some of our tests:

ERROR: PNP: 002e.4 70 irq size: 0x0000000001 not assigned
(panther port of Ieab1c776b553c996a7d06e4059110943aaf41338)

BRANCH=none
BUG=chrome-os-partner:23945
TEST=boot test on Panther

Change-Id: Id45c3bdc0d2feaf6f75d984c41d1f6ffef592d4d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/177468
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@google.com>
Tested-by: Mohammed Habibulla <moch@google.com>
Reviewed-on: http://review.coreboot.org/5994
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12 20:16:49 +02:00