Commit Graph

4972 Commits

Author SHA1 Message Date
Uwe Hermann aac8f661f5 Factor out fill_processor_name() and strcpy() functions.
The fill_processor_name() function was duplicated in multiple
model_*_init.c files, move it into a new src/cpu/x86/name
directory.

The strcpy() function was also duplicated multiple times, move it
to <string.h> where we already have similar functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-29 09:54:16 +00:00
Jonathan Kollasch 7ff5b449ce As $PWD is not exported by all shells, use make-builtin $(CURDIR)
instead of $(PWD).

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28 21:11:48 +00:00
Warren Turkal 1f98ee72c3 Fix small typo in root Makefile.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28 21:02:03 +00:00
Uwe Hermann 5c9bc138ec Drop some unneeded "#if CONFIG_USBDEBUG" (trivial).
We don't surround the <usbdebug.h> #include with those checks in other
places either. Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28 17:48:24 +00:00
Myles Watson 24a5213a39 Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28 16:16:58 +00:00
Zheng Bao 7b1a3c334c Trivial. re-Indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28 04:43:16 +00:00
Warren Turkal 3bd792947b I missed these boards in a previous commit.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:28:21 +00:00
Stefan Reinauer c0bde289c2 Good bye, OLPC...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Nils Jacobs <njacobs8@hetnet.nl>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:26:46 +00:00
Warren Turkal e0afe735a0 All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:18:26 +00:00
Warren Turkal 768d8ea098 Move CAR config from mainboard to CPU config for AMD GX2 boards.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:15:56 +00:00
Warren Turkal 0e8f204277 The commandline parsing for abuild doing a couple of buggy things:
* Long options of the form --opt=arg were not having the arg stripped
  off into a another argument in the output. As a result, all long
  options with args had to be written like "--opt arg" on the command
  line to be recognized.
* The --remove option was shifting too many times.

As a bonus, I also added some logic to make "make distclean" cleanup
the default abuild build dir.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:14:19 +00:00
Warren Turkal 7571c0b566 This patch moves one of the CAR configs to the socket from the single
mainboard that uses it.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:11:54 +00:00
Xavi Drudis Ferran 7cdf1eca92 Obviously missing brackets.
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:08:40 +00:00
Stefan Reinauer 49a7ac7ee5 drop some dead code from model_fxx_init.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 21:00:34 +00:00
Stefan Reinauer 4f7a5c4544 oops. always run abuild on a clean tree with no other patches applied.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 20:51:33 +00:00
Stefan Reinauer c679ab5425 RAMBASE = 0x4000 is no longer needed. Drop it.
Now we only need to clean out the FAM10 stack mess and we're good to go with a
uniform RAMBASE.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:57:07 +00:00
Stefan Reinauer 5e278cafb5 drop excessive blank line
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:55:00 +00:00
Stefan Reinauer 2a8ad41e7b Add 2 missing license headers based on svn logs and remove an unneeded #include
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:49:46 +00:00
Stefan Reinauer 2dd1ded197 minor include cleanups
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:48:15 +00:00
Uwe Hermann 7ac4c26177 Add a kconfig option to allow the user to select a specific physical
USB port for use as Debug Port (on chipsets which support that).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 18:03:18 +00:00
Uwe Hermann 5211a7023e Add a few missing license headers based on svn logs, and also add a
few more code comments to src/cpu/x86/*.inc files.
 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 17:53:17 +00:00
Stefan Reinauer da28cd8542 drop double include (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 11:11:09 +00:00
Jonathan Kollasch 86d1a50796 Duplicate the MCP55 EHCI Debug Port enable code for use with CK804.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 16:01:08 +00:00
Warren Turkal 024d248e98 i82801bx defines the hard reset function, so move the "select" statement to
that component rather than the mainboard.

The intel/d810e2cb is the only board using the i82801bx southbridge.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:23:28 +00:00
Warren Turkal 09f51827d5 Remove hard reset config from some mainboard configs
Most of the mainboards with i82801gx SBs seem to use the
HAVE_HARD_RESET, which is already selected in the i82801gx SB config.
Removing it from some of those boards should be a functional no-op.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:20:56 +00:00
Stefan Reinauer ef077f2394 drop some more unneeded ../../..
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:19:44 +00:00
Warren Turkal d6924e820f Normalize the config option for the Intel Atom CPU.
All Intel CPU models appear to be identified with the form
INTEL_CPU_MODEL_xxxxx. I haved changed the Atom to fit this normal form.

A side effect is that the CPU doesn't need to be listed on the boards
that support it since the socket identifies the CPUs it supports.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:18:21 +00:00
Stefan Reinauer 64b26009a1 the utility is called dumpmmcr, not dump_mmcr
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:15:48 +00:00
Stefan Reinauer 48323b5873 dumpmmcr utility is available under util and shares most of the code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:04:46 +00:00
Stefan Reinauer e079ce31c9 update license header for dumpmmcr utility according to svn history.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 15:04:14 +00:00
Uwe Hermann 02260bcdee Fix the build, CONFIG_USBDEBUG must always be defined (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 10:34:36 +00:00
Uwe Hermann 65e60344ad Only show the USB Debug Port kconfig option to the user if a mainboard
is selected that uses a chipset which actually has that functionality _and_
we have code to initialize the Debug Port in coreboot (for that chipset).

Also, remove the duplicate list of PCI IDs and just link to the wiki page at:

  http://www.coreboot.org/EHCI_Debug_Port

The list is now less useful in the kconfig help as this option will only
appear for those boards where it's actually supported.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-26 07:35:55 +00:00
Uwe Hermann dc3aa7abff Various Debug Port southbridge implementation fixes / cosmetics.
- Use PCI_COMMAND and PCI_COMMAND_MEMORY from pci_def.h instead of
   hardcoding their values.
   
 - SB600/SB700: Drop useless/unused SB600_DEVN_BASE and SB700_DEVN_BASE.
 
 - ICH7: Drop unused EHCI_CONFIG_FLAG and EHCI_PORTSC.
 
 - s/uint32_t/u32/.
 
 - Cosmetics, whitespace, coding style fixes and added code comments.
 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 23:47:15 +00:00
Patrick Georgi 86224f634a Mark read-only data as read-only, so the global vars test doesn't fail on it.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 17:24:10 +00:00
Patrick Georgi 7f43dc1060 Add an EHCI driver to libpayload's USB stack.
Interrupt transfer support is missing (ie. no keyboard),
bulk and control transfers work (ie. mass storage).

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 17:01:13 +00:00
Uwe Hermann 5df4168db8 Drop some useless "../../../" in #includes (trivial).
Build-tested using abuild.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 16:17:20 +00:00
Uwe Hermann f14c9194ff Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial).
Some boards still used the old DEBUG_RAM_SETUP (without _CONFIG prefix).

Also, consistently use "#if CONFIG_DEBUG_RAM_SETUP" (not #ifdef) as we do
elsewhere.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 14:58:28 +00:00
Uwe Hermann 370d979a93 Various USB Debug Port fixes (trivial).
- Drop unused DBGP_DEFAULT #defines on boards with chipsets where no
   USB Debug Port support is implemented anyway (at the moment, at least):

    - hp/dl145_g3
    - hp/dl165_g6_fam10

 - ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges
   with Debug Port hardcode the physical USB port used as Debug Port to 1.
   In other words, this port is not user-configurable (as seems to be
   the case on NVIDIA MCP55). For now we keep the 'port' parameter in order
   to not change the API, this might be fixed differently later.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 14:23:31 +00:00
Patrick Georgi bcabf2fa74 Make globals in romstage break the build, so we don't have to
wonder why variables in .data or .bss (both somewhere in ROM space)
are wrong.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 14:15:41 +00:00
Uwe Hermann b124dcf935 Drop <cpu/amd/mtrr.h> #include from Intel CPUs.
Three CAR implementations on Intel CPUs include <cpu/amd/mtrr.h>, which
is obviously wrong, so drop the #includes. None of their #defines are used
in the Intel code.

Build-tested with two of the affected boards.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 12:37:33 +00:00
Myles Watson 7fd931b11d Keep the mc146818rtc.h include close to the option table include where
possible. 

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 10:42:55 +00:00
Stefan Reinauer 10ec0fed8e - Fix race condition in option_table.h generation by moving the include
statement to those files that actually need it. This significantly 
  reduces the number of dependencies, so it's no longer extremely ugly to
  specify them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-25 10:40:47 +00:00
Uwe Hermann ff492b1855 Make SB600/SB700 more similar for easier diffs (trivial).
Also fixes random whitespace issues, typos, etc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 23:37:25 +00:00
Patrick Georgi 977b985095 Fix CCACHE handling, and make use of ccache's BASEDIR feature
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5836 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 22:15:54 +00:00
Patrick Georgi 20979584fe Automatically fetch bus information for mptable from
the device tree, instead of using hardcoded values.

If this changes behaviour, this is either
- a bug in mptable_write_buses(), or
- a bug in the old mptable or device config, that is
  they were inconsistent.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 18:42:56 +00:00
Patrick Georgi 0a6d1aebf1 Undo stupid mistake in r5832
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 18:28:50 +00:00
Uwe Hermann b015d02a85 Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.
Without a (currently) dummy set_debug_port() function the build fails,
this may or may not be fixed differently in the future.

Manually build-tested on all SB600/SB700 boards, and tested on hardware on
one SB600 board I own, works fine.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 18:18:20 +00:00
Patrick Georgi 8a6163e02b Fix hp/dl165_g6_fam10 build. Failed to take r5800 and
another recent change into account.


Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5832 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 18:12:46 +00:00
Arne Georg Gleditsch 9139e7b7c5 Add support for HP DL165-G6 with Fam10 CPU.
Original patch was
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>

Updates to accomodate changes in coreboot are
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-24 17:35:32 +00:00
Uwe Hermann 16db6c3486 Whitespace/typo/cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-23 18:48:27 +00:00