Commit Graph

3200 Commits

Author SHA1 Message Date
Patrick Rudolph aac3b31dbb util/intelmetool: Fix crash on strict devmem kernels
Don't crash if mapping MEI PCI memory fails.
This can happen if CONFIG_STRICT_DEVMEM is enabled.

Change-Id: I33c75a7cccb4cefaa26f70aed4bdc4bd620cdad0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:26:46 +00:00
Paul Menzel 44ad86a723 util/scripts: Add script to alphabetize MAINTAINERS file
Copy script from Linux added in commit 7683e9e5 (Properly alphabetize
MAINTAINERS file) by Linus Torvalds.

> This adds a perl script to actually parse the MAINTAINERS file, clean
> up some whitespace in it, warn about errors in it, and then properly
> sort the end result.
>
> My perl-fu is atrocious, so the script has basically been created by
> randomly putting various characters in a pile, mixing them around, and
> then looking it the end result does anything interesting when used as
> a perl script.

Change-Id: I2eb4e3f9863d0fe242fb690f1121842c80d72d6a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/20742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:25:31 +00:00
Piotr Kubaj f3bd97cb89 util/lint: Fix execution on OpenBSD
util/lint/lint creates a file using mktemp.
mktemp on OpenBSD requires at least 6 X's, while only 5 are in the template.

Change-Id: I0b80214dd83d21e12e16a5002c68127a7ca2e41b
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
Reviewed-on: https://review.coreboot.org/19745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:19:07 +00:00
Piotr Kubaj 1b36c9de66 nvramtool: Fix build with OpenBSD
OpenBSD needs the same includes as NetBSD. It also doesn't have x86_64_iopl
function, but amd64_iopl.

Change-Id: I28273d4d87a3a77cf35412a0695325c0535e42e5
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
Reviewed-on: https://review.coreboot.org/19741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-16 22:18:26 +00:00
Dan Elkouby 3781e1fda9 autoport: add missing PCI IDs
As seen on ASUS P8Z77-V Pro

Change-Id: I9fce9a35174b5120f67c2345a0807db1b843eb48
Signed-off-by: Dan Elkouby <streetwalkermc@gmail.com>
Reviewed-on: https://review.coreboot.org/25661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-16 08:33:43 +00:00
Jonathan Neuschäfer fbc66b9dc0 util/cbfstool: Print all supported architectures
The list of supported architectures in the usage output of cbfstool is
currently hardcoded and outdated.

Use the arch_names array in common.c to provide and up-to-date list.

Change-Id: I3e7ed67c3bfd928b304c314fcc8e1bea35561662
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-11 14:12:00 +00:00
Jonathan Neuschäfer e32cea15c8 util/cbfstool: Print types on stdout
Currently, "cbfstool -h | less" doesn't show any file types under
"TYPEs:". That's because the file types are printed with
print_supported_filetypes, which uses LOG, which prints to stderr.  Use
printf print_supported_filetypes, and thus print to stdout, to make the
usage output more normal.

Change-Id: I800c9205c59383b63a640bc0798a1bd9117b0f99
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-11 14:11:17 +00:00
Jonathan Neuschäfer f059f96c38 util/board_status/to-wiki: Remove link to xivo's git tree
coreboot doesn't support any Xivo boards, and their tree has been only
available as a tarball for a while. Let's remove this link from the
Supported Motherboards page's preamble.

It's still listed on https://www.coreboot.org/Supported_Motherboards/old.

Change-Id: I50e7bec02e803b62563f21384d857f1b37904dd1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-10 10:48:30 +00:00
Jonathan Neuschäfer 60e8f1dbd9 util/board_status/to-wiki: s/corebootv4/coreboot/
corebootv4 vs. just coreboot has lost its significance. Version 4.0 has
been released in February 2010.

Change-Id: Ic2a35739e53fea411efc8691f1ba7db85ba0c764
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-10 10:48:18 +00:00
Alexander Couzens f126b4b8f8 crossgcc/Makefile: don't allow to call buildgcc in parallel
Change-Id: If296414f8cb3bc87862cdc20f3d3acc1a3f78556
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/21229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-04-09 09:40:34 +00:00
Naresh G Solanki a6464b7ffd util/lint: Generate json output from checkpatch output
checkpatch_json.py processes the output of checkpatch.pl &
generates json format output of comments.

This json format output can be used to post comment on particular
CL using gerrit.

BUG=None
BRANCH=None
TEST= Run following commands:
1. Capture output of checkpatch.pl to file say checkpatch.txt
nice -n 20 git diff HEAD~ | util/lint/checkpatch.pl --no-signoff -q - |
tee checkpatch.txt
2. Generate json format file for the output.
util/lint/checkpatch_json.py checkpatch.txt comment.json
3. Post the comment.json using gerrit
ssh  coreboot.org gerrit review  -j  "<CL number>,<patchset number>"  < comment.json

Change-Id: I2471792796ab8e7d9855a6559fc731345ebd1525
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/23429
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-09 08:18:43 +00:00
Patrick Rudolph b90c0d90cf docker/coreboot-sdk: Add device-tree-compiler
Add dtc to Dockerimage for Jenkins.

Change-Id: Ifa3608f0a83431e75fbd402385863cce06e249fb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25525
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-06 10:29:01 +00:00
Nicola Corna 8882ac55ef util/me_cleaner: Update to v1.2
Changelog:
 * Add support for the HAP/AltMeDisable bit
 * Add support for selective partition removal
 * Fix the ME permission removal on gen. 3
 * Add public key match
 * Print the compressed size of the Huffman modules on gen. 2
 * Wipe the ME6 Ignition firmware images
 * Fix the removal of the last partition on ME6
 * Various region size fixes
 * Add manpage
 * Add setup.py
 * Print the value of the HAP/AltMeDisable bit

The output image should be identical, except for the platforms affected
by bugs (ME 6.x, but it's not supported by coreboot and ME 11.x with the
-d option, but it's not being used in our build process).
Overall, nothing should change when it's used with the
CONFIG_USE_ME_CLEANER option.

Tested on a Lenovo X220 and Sapphire Pure Platinum H61.

Change-Id: I3d5e0d9af0a36cc7476a964cf753914c2f3df9d2
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/25506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-04-06 06:54:14 +00:00
Ivan J 85c76c9bc0 intelmetool: Include <sys/io.h> for musl-libc
This allows compiling the program using musl-libc, since otherwise
iopl(2) is undeclared.

Change-Id: Ia27203cf47b9be3f7bf1ad422c8f490caeae8f56
Signed-off-by: Ivan J. <parazyd@dyne.org>
Reviewed-on: https://review.coreboot.org/23834
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-05 14:01:39 +00:00
Nico Huber 54fe32f677 inteltool: Add some Skylake desktop ids
Change-Id: I1738a2544eb2435cb4b8718bcce5170d1ef04f72
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/25144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-03-27 15:42:14 +00:00
Furquan Shaikh 088b6e8f8b util/ifdtool: Fix region access control for SKL/KBL
The default values used by ifdtool for setting region access control
do not match the expected values for SKL/KBL as per the SPI
programming guide. This change adds platform "sklkbl" that sets region
access control bits differently for SKL/KBL images.

BUG=b:76098647
BRANCH=poppy
TEST=Verified that the access control bits on KBL images is set
correctly.

Change-Id: I1328d8006c25be282b3223268d8f1fd0a64e2ed3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/25306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-03-22 05:03:58 +00:00
Nico Huber d91c932517 util/inteltool: Add missing #include <string.h>
Change-Id: I7bb142d9f936b73e84d301028069d85cc15d596a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/25143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-03-15 08:49:49 +00:00
Aaron Durbin e5372ded41 util/x86: add page page table generator
Certain platforms need paging enabled during cache-as-ram because
dirty lines are being evicted by a heavy speculative frontend. Paging
needs to be enabled in order to utilize the NX (no execute) bit for
the regions that are strictly data (such as the stack). This utility
creates 32-bit PAE page tables using a static address space, and
the resulting tables have entries for all the PDPTEs such that it makes
it easy to enable 2MiB naturally aligned DRAM mappings once memory is
trained. Either binary files can be generated or C files. The pages that
are linked use a default base address of 0xaa000000 that can be changed at
runtime to reflect where the page tables are actually loaded. Or
specify a physical address on the command line that is known a priori.

iomap.txt:
0xd0000000, 0x100000000, UC, NX # All of MMIO
0xff000000, 0x100000000, WP, # memory-mapped SPI
0xffff8000, 0x100000000, WP, # XIP bootblock
0xfef00000, 0xfefc0000, WB, NX # CAR
0xfef40000, 0xfefc0000, WB, # verstage
0xfef20000, 0xfefc0000, WB, # romstage
0xfef40000, 0xfefc0000, WB, # fsp-m

$ go run util/x86/x86_page_tables.go --iomap_file=iomap.txt
Merged address space:
00000000d0000000 -- 00000000fef00000 UC NX : 375 big 256 small
00000000fef00000 -- 00000000fef20000 WB NX : 0 big 32 small
00000000fef20000 -- 00000000fefc0000 WB    : 0 big 160 small
00000000fefc0000 -- 00000000ff000000 UC NX : 0 big 64 small
00000000ff000000 -- 0000000100000000 WP    : 8 big 0 small

Total Pages of page tables: 5

Pages linked using base address of 0xaa000000.

BUG=b:72728953

Change-Id: I47625a24979b196011e2293712a8cdbdbb880d79
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/24919
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-03-07 21:15:43 +00:00
Denis 'GNUtoo' Carikli 3ef241f0c8 cbfstool: Add install target to Makefile
Change-Id: I5df7033e1e52c78e97cdbd26aef2d7824ea67f8b
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/12403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-03-06 22:19:47 +00:00
Richard Spiegel 7b89a28149 util/amdfwtool/amdfwtool.c: Check fstat return
Funtion fstat will return -1 if there's any error, 0 if successful.
Check that fstat return is equal to 0, print error message and exit if
not 0.

This fixes CIDs 1353018 and 1353020

BUG=b:72062481
TEST=Build no errors

Change-Id: I83284d9125c75a29471f213f88b9181d5edba2e6
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-22 09:59:40 +00:00
Jonathan Neuschäfer 3af80a9377 util: make-spike-elf.sh: Fix busybox mktemp compatibility
Busybox mktemp does not support patterns with any characters after the XXXXXX
part. Drop the .o extension to make make-spike-elf.sh work on Alpine Linux.

Change-Id: I2e37ceef115c6d4d31eb617558481b2284dada83
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-20 23:14:06 +00:00
Furquan Shaikh 35972def1d util/cbmem: Re-order regex for "cbmem -1"
In case of console dump for only the last boot, cbmem utility checks
for a list of regex in provided order. When pre-cbmem console
overflows, "Pre-CBMEM <stage> console overflowed.. " message is added
before "... <stage> starting" message. This change fixes the order of
regex in cbmem utility to match this.

Test=Verified on soraka that "cbmem -1" correctly dumps the data
starting from Pre-CBMEM romstage overflowed.

Change-Id: I9c5667bbd02ed3e93ac77a4f42e87d754a062919
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/23800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-19 22:00:16 +00:00
David Hendricks bb90fb55d0 board_status: Make board_status more friendly for local usage
board_status.sh was originally written for use cases where the DUT
is remote, i.e. accessed via serial port or SSH. This lead to some
issues when attempting to run the script on the DUT itself.

This patch attempts to handle the local use case more gracefully.
sudo is used when running the cbmem command, and the '-c' option
can be used to set cbmem path in case it's not in the default path
used by sudo.

Change-Id: I62957678ccae65fc46fd6ddf5ae92983d36cffad
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/21566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-02-16 22:40:20 +00:00
David Hendricks 0dcfb59220 board_status: Don't fetch dmesg via SSH when run over serial
It doesn't make much sense to try and obtain dmesg via SSH if we're
using the serial port. Serial should only be used to obtain dmesg if
SSH is unavailable.

Change-Id: Iec70e64666f9446cf7e98a0fbcaa1cd5cefd8898
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/21567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-02-16 22:40:10 +00:00
Martin Roth 681bf41087 util/broadcom/secimage: Add distclean target
When running 'make distclean' on coreboot, the build cleans the tools
as well. Since secimage didn't have a distclean target, it gave an error
that the distclean target didn't exist.  This didn't actually affect
anything more than the secimage clean, but it was impossible to tell
that from the warning:

% make distclean
make[1]: *** No rule to make target 'distclean'.  Stop.

Change-Id: I4b4bcc1ab48e767218d31e455d23527acedf4953
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-10 23:49:58 +00:00
Alex Thiessen 457d1c8fa2 util/broadcom/secimage: Add HMAC test
One of responsibilities of the `secimage` tool is signing the image
using the HMAC-SHA256 algorithm. The test being added verifies that
secimage's internal call yields same result as the according openssl
tool does.

Change-Id: I8de4328f435af56901a861e3d5e733657c3c7f78
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23474
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-06 16:14:33 +00:00
Arthur Heymans 485c0ad078 inteltool: Add Cougar- and Pantherpoint PCH PCI IDs for SPI
Tested to display the register content correctly on a Lenovo Thinkpad
X220.

Change-Id: I8b65302ed52d4ef1a31bf0cdd9208b368eb7ad67
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-02-06 16:11:45 +00:00
Arthur Heymans 921fa84f9e inteltool: Fix displaying 64bit spi registers
The registers were taken from the wrong addess since the spibar offset
was not added to it.

This also fixes the endianness.

Change-Id: I8bb91517770359599fe5f579c4686434da8d1c27
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23478
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-06 16:09:03 +00:00
Arthur Heymans 179a9048dd nvramtool: Fix message when option table is not found
Having an option table pertains to CONFIG_USE_OPTION_TABLE.

Change-Id: Ia8a84e3e59ee50444c7f7d17b34bea86ee475909
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-06 15:29:30 +00:00
Martin Roth 215bc53117 util/docker/coreboot-sdk: Add libftdi1-dev
chromeec uses libftdi1-dev, so add it to the image.

Change-Id: I517e3f073062dcc6b0b8e3adaf7b0123290a1698
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-31 16:44:25 +00:00
Arthur Heymans c32e6cb34a autoport: Don't do writes to FD in romstage
ff4025c5f "sb/intel/bd82x6x: Reduce function-disable mess"
Removed most of the writes to RCBA(FD) and renamed the function to
mainboard_rcba_config.

Writes to FD are properly handled in ramstage, so no need to do it in
romstage.

Change-Id: I4edb75569ceec2d2f1308755a66d286202ca0ae6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23486
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-30 23:17:58 +00:00
Martin Roth a9868b2dfc util/lint/checkpatch.pl: Untaint filename
This fixes the warning that is seen on the jenkins server:
Insecure dependency in piped open while running setgid at
util/lint/checkpatch.pl line 958.

Change-Id: I476efa76ef6a275584a47ec0ecf2315948d53e9d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23473
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-01-29 15:34:59 +00:00
Alex Thiessen 0e329816bd util/lint: Apply `final newlines` check to scripts
The `lint-extended-015-final-newlines` script skips over executable
files and thus leaves script files unchecked.

Use `file` to find scripts and include them in the `final newlines`
checks. Whitelisting is used including bash, perl, python and sh
scripts.

Change-Id: I8649b261b7e2cbbac7f9b90a9ace3f1c7b0eedeb
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23325
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-26 17:28:16 +00:00
Justin TerAvest ca2ed9f450 sconfig: Add a new mmio resource type
Add support for a mmio resource in the devicetree to allow
memory-mapped IO addresses to be assigned to given values.

AMD platforms perform a significant amount of configuration through
these MMIO addresses, including I2C bus configuration.

BUG=b:72121803

Change-Id: I5608721c22c1b229f527815b5f17fff3a080c3c8
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/23319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-25 16:50:17 +00:00
Martin Roth bf78d07feb util/docker/coreboot-sdk: Add msitools & rsync
- The em100 project needs msitools.
- Flashrom uses rsync.

Change-Id: Ie01064adede25471a860bc22c0a59b31202b56c2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/23369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-24 17:42:47 +00:00
Richard Spiegel 137484dee7 util/amdfwtool/amdfwtool.c: Verify it actually read bytes
The function read() returns the number of bytes actually read. Program is
assuming it actually read the required number of bytes without checking.
This is wrong.

This fixes CIDs 1353019 and 1353021

BUG=b:72062481
TEST=Build no errors

Change-Id: I22d41b3de4eac5369f512f78b1b31cc1a250f787
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-24 16:24:29 +00:00
Richard Spiegel bff4545ccf util/amdfwtool/amdfwtool.c: Check for negative return
File open function <open()> will return -1 if there's any error. Check that
the return is greater or equal to 0 before using fstat(). Print error message
and exit if there's an error.

This fixes CIDs 1353018, 1353020, 1353027 and 1353028

BUG=b:72062481
TEST=Build no errors

Change-Id: I77d6973d1ad1eadb93922866e618038045be5937
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-23 20:10:52 +00:00
Alex Thiessen 73f19dca38 util/lint: Unify checks for git worktree
Linters try to determine whether they are running in a git worktree so
that `git grep` can be used instead of `grep`. These checks are done in
different not truly correct ways and thus the linters don't use `git
grep` when running from a worktree subdirectory, e.g. in a git subtree
environment.

Unify checks using `git rev-parse --is-inside-work-tree`.

Change-Id: I3f54afc99ad0f0e3052cffdd32bdd9649cf3d720
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:42:51 +00:00
Alex Thiessen 1758fd2a32 util/genbuild_h: Add gitfile support
`genbuild_h.sh` checks whether it is running from a coreboot's own git
worktree to decide whether to use git as the time source. This check
fails when `${top}/.git` is a gitfile, e.g. when coreboot is a
submodule.

Add a proper `git rev-parse` call to check the condition, remove `$top`
which is not used anymore.

Change-Id: I8bb13d607a01f4f28fa8b165769e0a1f702da362
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:33:02 +00:00
Alex Thiessen 101485c73d util/gitconfig: Replace printf with heredoc
The `gitconfig.sh` script contains a call to `printf` with a lengthy
argument where no format string is used at all. Replace it with a
heredoc for better readability.

Change-Id: I42dbaa570ab9661991fa5d9b4577c9aed05c2981
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:22:40 +00:00
Denis 'GNUtoo' Carikli d5dee1e8a0 util/bincfg: don't use fp shared variable
Change-Id: Ie710f8c6c06332830c3edb9e5490d1e4877ee33b
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23241
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:21:48 +00:00
Denis 'GNUtoo' Carikli fa0bdfc120 util/blobtool: move declaration to their own header
Change-Id: I556a122753e8a35c4ed32df460a5e12fa85de7f7
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23244
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-23 05:21:28 +00:00
Denis 'GNUtoo' Carikli 3cb25bbbc3 util/bincfg: cleanups: use static whenever possible
Some non-static declaration remains. If they were made
static, the compiler would output some warnings:
  bincfg.y:30:1: warning: useless storage class specifier in empty declaration
   };
   ^
  bincfg.y:47:1: warning: useless storage class specifier in empty declaration
   };
   ^
  bincfg.y:22:12: warning: ‘yylex’ used but never defined
   static int yylex (void);
              ^~~~~
  bincfg.y:456:13: warning: ‘set_input_string’ used but never defined
   static void set_input_string(char* in);
               ^~~~~~~~~~~~~~~~

Change-Id: I753e99c4a8290f9edd9abcda9af8e33b6ccfe406
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23243
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-01-23 05:20:45 +00:00
Christoph Pomaska 36e809ffd6 autoport: Add missing command to readme
The readme.md file was missing the instruction to also compile superiotool,
because autoport errors out without a working version of it.

Change-Id: Ic426b7312f68d59e2e0503d61da694adc9d4fb3f
Signed-off-by: Christoph Pomaska <cp_public@gmx.de>
Reviewed-on: https://review.coreboot.org/23282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-01-23 05:18:35 +00:00
Alex Thiessen 7bcd6ecea6 util/gitconfig: Use `make` in git hooks
As the code was moved from the Makefile.inc to a separate file in
commit 9ab8ae6a (util/gitconfig: Make gitconfig a bash script),`$(MAKE)`
was replaced by `remake`, introducing dependency on this tool which is
basically a `make` with debugging capabilities. Many developers don't
have `remake` installed, leading to pre-commit hooks being not executed
properly. Apparently this was an unintentional change.

Furthermore, special treatment of `make` tool via the `%MAKE%`
substitution performed during hooks' deployment is still desired. Use
case is calling `remake gitconfig` to set `remake` as the `make` tool in
the hooks. To accomplish this, add a parameter that is passed from the
Makefile.inc to gitconfig.sh.

Change-Id: Ia78e06567b904b342dc9b7778569201fe02e6897
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-23 05:18:14 +00:00
Alex Thiessen 687b96155c util/*: Fix final newlines in scripts
Some script files under the `util` directory have no final newline or
multiple final newlines. This is fixed so that an adapted
`util/lint/lint-extended-015-final-newlines` does not bark at them
anymore.

Change-Id: Icec08f1fc7ea837906653475b7f821aa1a143169
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-23 05:17:44 +00:00
Alex Thiessen 7c7181fc96 util/gitconfig: Replace subshells with braces
The check for `user.name` and `user.email` being set is done in
`gitconfig.sh` and it uses two subshells where none is actually needed.
Stream redirection can be consolidated.

Change-Id: Ia1d19eb3c11f9d11f030dcc179bc175956cd7116
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-22 12:34:02 +00:00
Alex Thiessen 7459eeb18a util/gitconfig: Update `sup-destroy` git alias
The `git sup-destroy` alias uses a subshell in order to make `git
submodule deinit` deinitialize all submodules. This isn't necessary as
the `--all` switch does the same.

Furthermore, `git submodule init && git submodule update` equals to `git
submodule --init`.

Change-Id: Ib690d66795da4049bb0bb350a0609cf2e6b5c4c4
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-22 12:33:41 +00:00
Arthur Heymans 82aa8338c7 drivers/mrc_cache: Always generate an FMAP region
This automatically generates an FMAP region for the MRC_CACHE driver
which is easier to handle than a cbfsfile.

Adds some spaces and more comments to Makefile.inc to improve
readability.

Tested on Thinkpad x200 with some proof of concept patches.

Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-20 16:11:44 +00:00
Arthur Heymans 1e931f3e47 autoport: Don't include default_irq_route.asl
This file is no longer there since ACPI pirq routing is now done in an
automated fashion in SSDT.

Change-Id: I8bafafbf670fe0fc2f20b46b5d8abee722931c6d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christoph Pomaska <cp_public@posteo.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-20 14:35:31 +00:00
Arthur Heymans c8c3aca818 autoport: Remove '-' from Kconfig options
This won't compile since '-' is an operator in C.

Change-Id: Icf900c959cbcbd0b07cd83a1f6866bf255fdcf01
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christoph Pomaska <cp_public@posteo.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-20 14:35:26 +00:00
Alex Thiessen 2ca4ca3f21 util/gitconfig: Fix too long lines in gitconfig.sh
Change-Id: Iaff0852259f0a91fb4c906e1a01d77b92f8a49f1
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 22:05:03 +00:00
Alex Thiessen fda071ca7a util/gitconfig: Make gitconfig.sh support gitfile
The `gitconfig.sh` script installs hooks to the according directories
(for coreboot and its submodules). It has the `hooks` directory
hard-coded to be `.git/hooks`, which makes the installation fail when
coreboot itself is a submodule because then `.git` becomes a gitfile.

Replace hard-coded path handling using the according `git rev-parse`
calls.

Change-Id: I778e20be24bb27d0081c9e1c12883117d6d50347
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 19:29:10 +00:00
Denis 'GNUtoo' Carikli f73914d1aa util/bincfg: Fix some whitespaces
Change-Id: I674a3f58a576948dc3c0cd32ef06b42ef13353ee
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 13:49:12 +00:00
Denis 'GNUtoo' Carikli 780e931eed util/blobtool: rename to bincfg
The name blobtool is confusing as 'blob' is also used to
describe nonfree software in binary form.

Since this utility deals with binary configurations it
makes more sense to call it bincfg.

Change-Id: I3339274f1c42df4bb4a6b30b9538d91c3c03d7d0
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/23239
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18 13:47:20 +00:00
Alex Thiessen da384dd7a4 util/release: Improve git worktree checks
The bash script `genrelnotes` checks for `.git` to be present to
determine whether the current directory is the top directory of a git
worktree. This check is rather weak and doesn't handle many edge cases
like that of a broken gitfile.

Add a proper `git rev-parse` call to check the condition.

Change-Id: I32b06ca982d55fd8e88e55651b6bc53014905823
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-17 16:54:22 +00:00
Nico Huber 1898023fb1 inteltool: Dump Sunrise Point PCH-H GPIO groups
Change-Id: Ib6b083c31617e19cbbb0929e2fc8ab39d54533bf
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:18:36 +00:00
Nico Huber 99b02a1d7c inteltool: Support for nasty Primary to Sideband Bridge (P2SB)
The Primary to Sideband Bridge (P2SB) is the interface to Private Con-
figuration Registers (PCR) including GPIO configuration. Of course,
access is restricted to Intel partners and criminals, so the PCI device
is hidden from the OS. Probably we only need to fetch the SBREG_BAR
address and can hide the PCI device again after that.

Change-Id: Ic121a09f021708aab82ae4b9d76d6c3c6fb884fa
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:18:05 +00:00
Nico Huber 76a4f71e89 buildgcc: Add patch to work around Musl libc issue
GCC includes `sched.h` after poisoning calloc(). This results in a
build failure with Musl libc. We work around the issue by including
`sched.h` earlier and throw around some void pointers so we only
have to do it in one place.

Change-Id: I1d5462eb9a448147a95dd4ec50361b3f5a28910c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-01-15 01:15:27 +00:00
Nico Huber afda56e1ad buildgcc: Drop libelf/elfutils
Looks like we were unnecessarily dragging this around for some time now.
GCC's installation manual doesn't mention libelf as a requirement and a
build of crossgcc-i386 doesn't show any sign of it being used.

This also fixes a lot issues on non-GNU distributions that were intro-
duced by switching to the elfutils version of libelf.

Change-Id: Iff308a9bed9ae3842557d251b75d1faadfafe0da
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:14:37 +00:00
Alex Thiessen 72d1089fac util/crossgcc: Output apt-get commands on debian
In the buildgcc script, there is a check that the tools required are
installed. When a tool is missing, a message is output suggesting an
installation method, e.g. `sudo apt-get install foo` on debian-based
systems.

When run on a true, vanilla debian system, the error message provides
only a generic hint because the `please_install()` function fails to
detect the OS kind. Detection is based on definition of `ID_LIKE` in
`/etc/os-release` yet such systems only define `ID` to `debian`.

This commit closes the detection gap. Tested on debian 9 (stretch).

Change-Id: I3c867837e9157bee13010bd0a005028c369ce55f
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 01:08:42 +00:00
Lubomir Rintel c1633045be util/superiotool: dump VT1211 registers
Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:42:43 +00:00
Lubomir Rintel 4d1bbe9908 util/superiotool: distinguish between VT82C686 and VT1211
They both have a device id of 0x3c. The former is part of the PCI chip set
accessible via port 0x3f0 while the latter is a standalone LPC chip accessible
via 0x2e/0x4e depending on strapping.

They're not register compatible: the VT82C686 only provides a FDC, LPT and part
of UARTs.

The VT82C686 documentation suggests it has revision 0x00 while the VT1211
datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a
revision of 0x02. Thus the revision is probably not good enough to tell one
from the another.

Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:42:26 +00:00
Lubomir Rintel 2f6a29e2e6 util/superiotool: recognize a VT1211 LPC superio
Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15 00:41:59 +00:00
Alex Thiessen 00a455c8a7 util/broadcom/secimage: Add OpenSSL 1.1 support
The `secimage` utility uses OpenSSL to calculate HMAC, which it does in
a rather unorthodox way, using deprecated `HMAC_CTX_init` API and
repeated calling of `HMAC_Init_ex` without a clear reason. The former
causes build errors with OpenSSL 1.1 while the rest of the
`HmacSha256Hash` function is confusing and overly complex.

Make `HmacSha256Hash` use a single OpenSSL API call. Test passed:
resulting signed binary remains identical.

Change-Id: Ib23c0ad96f9d8cc30ad357de8c0b0ba967c7d724
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14 23:11:40 +00:00
Gergely Kiss 64e0799d3b util/superiotool: add support for chip ITE IT8623E
Due to the lack of a datasheet, defaults are shown as
"not available (NA)" in the register dump.

Change-Id: I6baaf5dd95453fb1265425f357ea16c710c006ba
Signed-off-by: Gergely Kiss <mail.gery@gmail.com>
Reviewed-on: https://review.coreboot.org/23084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-01-14 07:24:05 +00:00
Alex Thiessen 6719862de8 util/gitconfig: Refuse to commit on lint failure
After running `lint-stable` in the pre-commit hook, its result is
ignored. This behavior was introduced in commit b18f522b
(lint/gitconfig: Enable checkpatch.pl checking of commits) and it
doesn't seem intentional. This issue was also mentioned in the revert
discussion (https://review.coreboot.org/c/coreboot/+/17440).

Enable `errexit` mode of the shell so that the hook fails when an error
occurs in any of the tests. Also, enable `nounset` mode to catch typos
easier.

Change-Id: I749963167660ea6a1a04d40a14ad1113e82f0f86
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-11 22:09:33 +00:00
Christoph Pomaska 48ac29ee4c util/inteltool: Add Skylake Desktop Northbridge
Add the 8086:191f North/Host Bridge to the list of definitions.
Adding the definiton makes the Northbridge get recognized by inteltool.

It is found in the Intel i5-6600K CPU:
https://ark.intel.com/products/88191/Intel-Core-i5-6600K-Processor-6M-Cache-up-to-3_90-GHz

Change-Id: Id746d1e8b3bb90b3b68a2f6c372890671dd61b5f
Signed-off-by: Christoph Pomaska <cp_public@gmx.de>
Reviewed-on: https://review.coreboot.org/23055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-10 22:04:33 +00:00
Alex Thiessen f4ceff37c8 util/lint: Check license headers of git hooks
Now that all the files under util/gitconfig have their license headers,
enable lint-000-license-headers to check the directory too.

Change-Id: I242256f72ac70553535509f83166c6d1ddb16fdc
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-10 09:50:37 +00:00
Alex Thiessen d4a3d01932 util/gitconfig: Add missing license headers
License header for the `gitconfig.sh` was copied from the Makefile it
was extracted from in commit 9ab8ae6a (util/gitconfig: Make gitconfig
a bash script).

License header for the pre-commit hook names Patrick Georgi as the
copyright holder as he is the original author.

Change-Id: Ie051e5e6ae7571050ece383e6be8236ed7d1ddd9
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-10 09:50:16 +00:00
Jean Lucas a241d6c76b autoport: Add Intel PCIe Root Port and Bridges
- 0x0151: Xeon E3-1200 PCIe Root Port
- 0x1e25: 7/C216 Series Chipset Family DMI to PCI Bridge
- 0x2448: 82801 Mobile PCI Bridge
- 0x244e: 82801 Desktop PCI Bridge

Change-Id: I4111b73adc0f08d643c940cd43ab7fd4c0af7668
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/22794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-07 18:46:24 +00:00
Alex Thiessen a71c66a52e util/gitconfig: Do not wait for user input
When running `make gitconfig` on a freshly cloned repository, the script
will wait for user input without a prompt in a call to `sed`, caused by
a spurious newline introduced in commit 9ab8ae6a (util/gitconfig: Make
gitconfig a bash script).

Change-Id: I2aa722c052d24dcffa9688df09bcf8dc767bd0b6
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-04 14:07:20 +00:00
Alex Thiessen ceb7788c80 util/gitconfig: Support dash in pre-commit hook
On debian systems, /bin/sh is `dash` which has built-in `echo` always
interpreting escape sequences such as '\n'. The pre-commit hook uses
the built-in for piping diff to checkpatch, interpreting the diff's
escape sequences in the process and leading to false negatives
and preventing commits despite conformance.

Use `printf` instead of `echo` when handling diff content. The bug was
introduced in commit ef869305 (util/gitconfig: update pre-commit
script).

Change-Id: I37edfe7b32721cb63d99299563cb11f26082c9a9
Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/23070
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-04 13:53:03 +00:00
Paul Menzel ceac787a4f inteltool: Add hint for compiler to avoid fall-through warning
Falling through is intended here, so add a comment that GCC will notice
and stop warning about this.

Change-Id: I12637b6bc18844a3bc47f06208df7fee7a4feb3b
Found-by: gcc-7 (Debian 7-20170316-1) 7.0.1 20170316 (experimental) [trunk revision 246203]
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Omar Pakker
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-12-22 16:54:16 +00:00
Patrick Rudolph 2d26a36910 util/inteltool: Add GPU device IDs
Add PCI device IDs for several Intel GPUs.

Change-Id: I7d6ba16b2b115187fd57a31716f23a610b520d3e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-12-20 16:41:46 +00:00
Martin Roth f183a85932 util/cbfstool: Check for NULL before dereference
Fixed coverity issue: 1302455 - Dereference null return value

Change-Id: I59b908adc4d35f08fda8e4ad3f806714f2caeb65
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22900
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-20 16:35:13 +00:00
Aaron Durbin facf14996c util/cbfstool: calculate cbfs file size for xip stages
The initial lookup for cbfs location for xip stages is implicitly
using the ELF size assuming it's relatively equivalent. However,
if the ELF that is being converted contains debug information or
other metadata then the location lookup can fail because the ELF is
considerably bigger than the real footprint.

BUG=b:70801221

Change-Id: I47024dcd8205a09885d3a3f76e255eb5e3c55d9e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22936
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-19 22:28:20 +00:00
Marc Jones 9ab8ae6a55 util/gitconfig: Make gitconfig a bash script
The gitconfig target has a few bashisms and would fail
silently on systems that use a POSIX standard sh (like Ubuntu dash).

Remove the code from the makefile and put it in a bash script that
is called by the gitconfig target.

Change-Id: I3bc8cf688a3ad211b57c8ca0e6b1e86c82dc6a37
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-12-15 23:02:11 +00:00
Martin Roth ac9d6b8c73 util/cbmem: Print timestamp frequency in verbose mode
The code flow is changed slightly to print the timestamp frequency from
either method of determining it.

BUG=b:70432544
TEST=Build and test cbmem -t -V

Change-Id: I02286fa67919e70a3592cdbcc1c9ca2991b7f385
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22821
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-12-12 22:27:05 +00:00
Paul Kocialkowski 826713ff61 nvramtool: Add dummy cmos-hw-unix accessor implementation for non-x86
The default implementation uses inb/outb, that is not available on ARM
platforms and others. A dummy implementation allows building nvramtool
on these platforms.

Change-Id: I75e4a1a0cbd35ca40f7b108658686839ccf9784a
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/22562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-09 16:56:09 +00:00
Daisuke Nojiri ff906fb95b cbfstool: Add '-p' option for padding
This patch adds '-p' to the 'add' command. It allows the add
command to specify the size of the padding added with the file
being added. This is useful to reserve an extra space in case
the file is too big to be relocated.

BUG=b:68660966
BRANCH=none
TEST=emerge-fizz coreboot &&
cbfstool image.bin add -n ecrw -f EC_RW.bin -p 0x10 ...
Verify image.bin has extra space in the file header.

Change-Id: I64bc54fd10a453b4da467bc69d9590e61b0f7ead
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/22239
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-12-08 16:05:52 +00:00
Nico Huber 27e8412b4a buildgcc: Hide stderr output of getopt test
Change-Id: I03c38de3a3b88d569d629be7483eb53164cf136a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-07 21:56:44 +00:00
Patrick Georgi 55d26875b3 lint-stable: Only check files tracked by git (ie source files) for +x
Change-Id: I99cbcba7a086ef950f248888a83cf24a4db4aee9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/21419
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-12-05 15:04:11 +00:00
Patrick Rudolph 3df9dbe886 util/intelmetool: Fix some platforms
Bootguard:
* Fix Mac support (ME_version can't be detected)
* Skip MSR read on older platforms (as it would fail anyway)
* Refactor MSR error handling
* Print Bootguard state "Unknown" on MSR read error

Change-Id: Iafe3f5c22c6caeedc556933405b9f6d83ec876a1
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-30 17:19:08 +00:00
Patrick Georgi 214dde058c crossgcc: fix edk2 tools_def template
Forgot the /bin/ part of the executable paths

Change-Id: I87d63ec18338e376787d02bb771471e746a17b62
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/22640
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-30 16:51:16 +00:00
Patrick Georgi 0c2df6f027 util/crossgcc: Install a template for the edk2 build system
Add a CBSDK tool set template that can be used in edk2 simply by
appending $prefix/share/edk2config/tools_def.txt to Conf/tools_def.txt.
After that, build -t CBSDK uses the coreboot compilers, providing a more
predictable compiler choice.

Change-Id: I76b38c928b831ee6f31450aa0ad59b4f906f394d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/22570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-28 10:48:01 +00:00
Philipp Deppenwiese 73add175cd util/intelmetool: Add bootguard information dump support
With this implementation it's possible to detect the state
of bootguard in intel based systems. Currently it's WIP and
in a testphase. Handle it with care!

Changes done:
* Add support for reading msr
* Read ME firmware version
* Print bootguard state for ME > 9.1
* Make argument -s legacy
* Add argument -b for bootguard (and ME) dumping
* Add argument -m for ME dumping
* Opt out early if CPU is non Intel

Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/16328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-25 12:59:54 +00:00
Patrick Rudolph 5e9dc37818 util/intelmetool: Fix lint errors and warnings
Clean the code to fix all errors and warnings.

No functional change.

Changes:
* Fix lines over 80chars
* Fix typos
* Restructure code to reduce indent level
* Move RCBA handling into own files
* Introduce helper functions for RCBA access
* Move GPL string into header
* Fix whitespace in macros

Change-Id: Ib8e3617ebb34c47959d6619dfbc7189045e6b8f7
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-25 12:55:56 +00:00
Maximilian Schander ae848f8719 util/inteltool: Add Skylake definition to MCHBAR reading
Taken from
   * 6th Generation Intel Processor Families for S-Platform 
       Volume 2 of 2
   * Page 56
   * 332688-003EN

Change-Id: I46c8dd77823870b55cc040f7f6c557cb5a2562a1
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08 11:42:45 +00:00
Maximilian Schander 798564333d util/inteltool: Add PCIEXBAR and PXPEPBAR reading for Skylake
Both registers behave the same as on the previous generation

Taken from
 * 6th Generation Intel Processor Families for S-Platform
     Volume 2 of 2
 * Page 55 and 62
 * 332688-003EN

Change-Id: Id02a38a7ab51003c9d0f16ebb2300a16b66a15f9
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08 11:42:26 +00:00
Maximilian Schander 98c11ddc9e util/inteltool: Add Skylake DMIBAR register dumping
Register definitions were taken from
 * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2
 * Page 117
 * 332688-003EN
As well as
 * 6th Generation Intel Processor Families for H-Platform Volume 2 of 2
 * Page 117
 * 332987-002EN

Tested on a 6th gen skylake mobile cpu and capability registers do match up
with the default values.

Change-Id: I636f6c3d045e297f1439d3e88e43f41e03db4c8e
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08 11:42:20 +00:00
Maximilian Schander bf94292522 util/autoport: Fix VGA register warning
The warning is printed using Printf syntax but actually Println is used
resulting in printing the format string first and the arguments second:
"%s. (%s) Default:%s WARNING: [...]"

Change-Id: I411fc47832dd7a82752f233c4909b98190340ccb
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22352
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-11-08 11:42:00 +00:00
Martin Roth 3ce678367c util/release: Update genrelnotes script for 4.7 release
- Fix initial tool check.
- Admit that the script is coreboot specfic.  Remove coreboot check.
- Fix some whitespace issues.
- Get rid of pushd/popd.
- Add keywords for section logging.
- Move code for getting SLOC into a subroutine.
- Find submodules to get patch count instead of having them hardcoded.
- Update specific change areas for 4.7 release

Change-Id: I115659a75604c24780c09605d7643e83e481f6a1
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-11-07 12:43:32 +00:00
Maximilian Schander 12217f2878 autoport: Fix nil pointer deref when run without bd82x6x
When autoport is run on a system without supported southbridge
it won't populate the coresponding data structure. By sanitiy
checking after PCI detection autoport can exit cleanly and
provide a sufficient error message.

Error was:
panic: runtime error: invalid memory address or nil pointer dereference
[signal SIGSEGV: segmentation violation code=0x1 addr=0x30 pc=0x4be595]
goroutine 1 [running]:
main.FIXMEEC(0xc42014af80, 0x14, 0xc42014afe0, 0x1a, 0xc4200a914f,
	0x4, 0xc4200a916f, 0xf, 0xc420149e60, 0x28, ...)
/coreboot/util/autoport/ec_fixme.go:14 +0x105

Change-Id: I6b0fcda76d33b0d3a0379c279f492160ce5add84
Signed-off-by: Maximilian Schander <maxschander@googlemail.com>
Reviewed-on: https://review.coreboot.org/22203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-07 12:31:21 +00:00
Piotr Król 64f87f3541 util/docker: add support for crossgcc building params
In some cases users may want to build just one toolchain not all. This
patch introduces COREBOOT_CROSSGCC_PARAM, which by default is set to
all_without_gdb so previous behavior is not changed. Users can pass
different parameter eg. COREBOOT_CROSSGCC_PARAM=build-x64 to build just
x64 SDK.

Change-Id: I858ba09644b5b86a4b0e828e4f342aee5083be93
Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-on: https://review.coreboot.org/22276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-11-05 02:31:16 +00:00
Maximilian Schander 17034d6f63 intelmetool: Print colored capabilities
In general more ME capabilities are considered harmfull, useless or
unwanted. Therefore an easy overview can be obtained by coloring in red
and green.

Taken from Change with id:
Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a
Add bootguard information dump support
https://review.coreboot.org/#/c/16328/

Change-Id: Ia911cc935d512174399aaf93bba982e071942212
Signed-off-by: Maximilian Schander <maxschander@googlemail.com>
Reviewed-on: https://review.coreboot.org/22217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-03 23:58:41 +00:00
Maximilian Schander df5b83fe2b intelmetool: Do small cosmetic changes
Refining some of the code indentations and cosmetics to
build upon and import some in-review changes.

Change-Id: I0038a146bd899f150518c4832258a42792abaabb
Signed-off-by: Maximilian Schander <maxschander@googlemail.com>
Reviewed-on: https://review.coreboot.org/22216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-03 23:58:08 +00:00
Maximilian Schander cb2d21d24d inteltool: Add southbridge and CPU definitions for Skylake
Change-Id: Id9501f11a79cb314bc407760b22006a3375e669d
Signed-off-by: Maximilian Schander <maxschander@googlemail.com>
Reviewed-on: https://review.coreboot.org/22211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-03 16:18:53 +00:00
Iru Cai 68c7118266 autoport: move spi_uvscc and spi_lvscc to devicetree.cb
Change-Id: I36866cc793b3ddf9a78fed2e2840958d08327e7d
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/20486
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-11-01 15:27:20 +00:00
Patrick Georgi cf24226ed9 util/*: don't strip executables
Users can do it if they need it, but we shouldn't force it on them.

Change-Id: I08007d68a79c302d8f3ca4ed0837ee96d8d3eb1e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/22213
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-10-29 08:48:56 +00:00