Commit Graph

10834 Commits

Author SHA1 Message Date
Patrick Georgi d11ff6b9df build system: remove duplicate architecture list
Let xcompile pass the list of architectures, given
that it already has it.

Change-Id: I565512d3bef987c9a4e48a39bfd88bacf0b65de9
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6254
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-30 21:06:43 +02:00
Daniele Forsi ad488d25b0 src/console/Kconfig: Fix choice for showing POST codes on console
Use CONSOLE_POST because the preprocessor conditional in post_code()
in src/console/post.c depends on it, while POST_IO is used in another
conditional for sending the codes to an I/O port.

Change-Id: Ia044cffb5f0aad0f8b2bb04faa12df11a705757a
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6416
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-30 20:34:08 +02:00
Martin Roth 90957f8852 mainboard/intel: Add Mohon Peak CRB for Intel's atom c2000
Add the Mohon Peak CRB.

Updates to come.

Change-Id: I0a8496d502bab905c6f35eff9fcd7eda266831ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6371
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 19:01:20 +02:00
Martin Roth 829c41da6c southbridge/intel: Add fsp_rangeley support
This adds the southbridge initialization pieces for Intel's Atom C2000
processor (formerly Rangeley).  It is intended to be used with the Intel
Atom C2000 FSP and does not contain all of the pieces that would
otherwise be required for initialization.

Change-Id: I416e85bd6e9c9dcf79f97785074135902fdd18b7
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6370
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 19:00:44 +02:00
Martin Roth 2963ae7fd4 northbridge/intel: Add fsp_rangeley northbridge support
This adds the northbridge initialization pieces for Intel's Atom C2000
processor (Formerly Rangeley).  It is intended to be used with the Intel
Atom C2000 FSP and does not contain all of the pieces that would
otherwise be required for initialization.

Not currently supported:
S3 suspend/resume
CAR memory Migration (No early cbmem console)
SMM

Change-Id: I7665212c892d9a08ecf35d7be70d0afe5fd2c77b
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6369
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 19:00:15 +02:00
Martin Roth 09670265b6 cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)
This adds the CPU initialization pieces for Intel's Atom C2000 processor
(Formerly Rangeley).

Change-Id: I77d69f42c959bbc294784f044b7b0dcc2e30f30c
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6368
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 18:59:35 +02:00
Daniele Forsi ddf54b1c8b util/sconfig: fix check for count of command line arguments
Valid invocations are when -s|b|k outputfile is missing (argc == 3)
and when it is followed by the file name (argc == 5); it's an error
when "outputfile" is missing (argc == 4) or when there are more
arguments than expected (argc > 5).
Fixes "Uninitialized argument value" error found by scan-build from
clang version 3.2-11.

Change-Id: I8c489863323eb60cbaa5e82a80f5d78a6ca893c2
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6378
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 13:16:55 +02:00
Daniele Forsi 201093ef6d util/i915tool: close the file also when fread() returned an error
Change-Id: I92f816aa1351a295287ebbcc78665ac87c318c23
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6386
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 13:16:53 +02:00
Gabe Black 06b13a37f0 cbmem: Terminate the cbmem console at the cursor position.
If the cbmem console buffer isn't zero filled before it's used, there won't be
a terminator at the end. We need to put one at the cursor position manually.

Change-Id: I69870c2b24b67ce3cbcd402b62f3574acb4c2a8f
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65300
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 8ec61e52a6a27ed518d0abb5a19d6261edf9dab1)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6404
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 11:49:45 +02:00
Vladimir Serbinenko 0dd5e4395e i82801ix: Allow configuration of SATA mode in CMOS.
Change-Id: Ice0f0273b16a946143c038a90b61978269c1c56e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6409
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-30 11:48:33 +02:00
Daniele Forsi 8e89847af4 util/cbfstool: free buffer on error path
Fix memory leak found by scan-build from clang version 3.2-11.

Change-Id: Id8f9db46cf42012a0eb0a632c9d83a4eec1989a2
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6379
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 10:36:00 +02:00
Daniele Forsi b532b12b41 model_fxx/processor_name.c, hudson/lpc.c: add missing break statements
Found by Cppcheck 1.65. Fixes:
(warning) Variable 'processor_name_string' is reassigned a value before the old one has been used. 'break;' missing?
(warning) Variable 'rsize' is reassigned a value before the old one has been used. 'break;' missing?

Change-Id: I4a5c947fd5cc5797eb026475ec7036bc5eaf58db
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6372
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-30 10:35:27 +02:00
Daniele Forsi abb381607f artecgroup/Kconfig, linutop/Kconfig: Add comment to endif
All other Kconfig files at the mainboard vendor level have a comment
on "endif" matching the corresponding "if", except these two.

Change-Id: Ib03c4552c670178d6b09a2ca3037ee29e3524a2f
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6396
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-30 02:08:50 +02:00
Daniele Forsi b8e96ed7b8 Kconfig: Fix comments on endif to match the corresponding if
Change-Id: I5c40de41a01d9c558f6c2795e19e643009804e70
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6397
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-30 02:08:07 +02:00
Edward O'Callaghan 76a1437dbe cpu/intel/model_2065x/model_2065x_init.c: Remove dead code
Unused array is dead code. Spotted by Clang build.

Change-Id: I11397716b39de08f1226413019e3beeeeaac6149
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6131
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-07-30 02:05:00 +02:00
Vladimir Serbinenko 787cbaeedb i82801ix: Enable usbdebug options.
Needed to be able to choose convenient usbdebug port.

Change-Id: I84b304f0f8fa79cc8d4a136ee6d78dc7659601c9
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6410
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-30 01:36:57 +02:00
Vladimir Serbinenko c4d8948797 gm45: Move spd address map to board-specific config.
Change-Id: I8f45a821ecd414dbd0129ae6d583d4e7dc06bc5a
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5931
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2014-07-29 22:37:00 +02:00
Vladimir Serbinenko a838aafc63 northbridge/intel/sandybridge/raminit_native: Remove stale FIXME.
S3 works just fine.

Change-Id: Icd7ae5ad8941bf749a4450efc61e7cede52bf5ef
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6407
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-29 22:36:34 +02:00
David Hendricks 77acf42819 pit: setup voltage rails before system clocks
This moves the call to setup_power() before system_clock_init().
This causes the PMIC to set up the voltage rails earlier so that
the CPU clock can be set up at a faster rate (in the follow-up
patch). After system clock init, we re-initialize the PMIC's I2C
bus since the input clock rate will have changed.

Old-Change-Id: Ieb828ac25daad7ee95bfa4823aaaf161028c9c92
Reviewed-on: https://gerrit.chromium.org/gerrit/64744
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 6c133a84ef4a32c35577a266905e02af8c2d9278)

pit: save setup_power() status and die later if needed

Since system clock and console initialization now happen after power
setup, we cannot print error messages in setup_power(). This patch
re-factors the code a little bit to save the status of setup_power()
so that if we get an error during setup_power() we will wait until
we can actually print something before dying.

Old-Change-Id: Id7ff477224b104b3c7e221c1d2df460ca9125f3b
Reviewed-on: https://gerrit.chromium.org/gerrit/65009
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 0c89f922b20bc1291ac7ba7b2c22bdce911be7a4)

Squashed two closely related commits.

Change-Id: I3efe29412738959e698c89d26e682536ceabdff8
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6403
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-07-29 21:49:50 +02:00
Vladimir Serbinenko 91175bb493 lenovo/x201 & x230: Add EC info to SMBIOS.
Based on X60 counterpart.

Change-Id: I1556f75db08edf47c9313dae91072335240d46ad
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4780
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 10:09:19 +02:00
Elyes HAOUAS 0f92f63055 Uniformly spell frequency unit symbol as Hz
Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6384
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 04:40:27 +02:00
Edward O'Callaghan 081651b667 northbridge/intel/nehalem/northbridge.c: Remove unused variable
Spotted by Clang.

Change-Id: I17e64ee989b611fac91072b9e97eab168cfae525
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6128
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-07-29 03:21:39 +02:00
Vladimir Serbinenko f2e206a7fd x230: Deploy VBT
Change-Id: Ide31a56bfdbc31cd3b87993dfb4ed8ef0107cdba
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5396
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-07-29 01:34:09 +02:00
Vladimir Serbinenko e0ceac3856 ec/lenovo/h8: Apply ME workaround on X230 on S3 resume.
This makes S3 work.

Change-Id: Ife14372f5f9bb151d7e6e98c6069eb99d5369baf
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6392
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 01:24:28 +02:00
Vladimir Serbinenko 5aa28f5c1b nehalem: Remove fake_vbt copying.
Instead generate simple VBT in code. Tested on X201.

Change-Id: I2244053edd24c22694161d9bf5f7f2f3eb4e2f57
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5895
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-07-29 01:24:19 +02:00
Vladimir Serbinenko 1783a3c1b5 ivybridge: LVDS gfx init.
Change-Id: If71e9c94922cd4283d5e175dfd8757d398a72be1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5285
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 01:23:56 +02:00
Edward O'Callaghan a014521b90 sandy/ivybridge: Native raminit (lint clean)
Remove some trailing whitespaces and add header guards for code
introduced in:

7686a56 sandy/ivybridge: Native raminit

Change-Id: Ifc9a785ea3a43cfe1f406b57eeba9b5f94f36711
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6393
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Tested-by: build bot (Jenkins)
2014-07-29 01:23:10 +02:00
Vladimir Serbinenko 7686a56574 sandy/ivybridge: Native raminit.
Based on damo22's work and my X230 tracing.

Works for my X230 in a variety of RAM configs.

Also-By: Damien Zammit <damien@zamaudio.com>
Change-Id: I1aa024c55a8416fc53b25e7123037df0e55a2769
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/5786
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 00:52:28 +02:00
Idwer Vollering b37ee1ee7c util/board_status: use the right location of cbfstool
The cbfstool binary in util/ doesn't exist as often as build/cbfstool does.
Since cbfstool obtains details from coreboot.rom, use the binary in build/

Change-Id: Id7d5632f4e5cbd5ede58cd136c37b0dacee9ff93
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/6299
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-28 23:18:56 +02:00
Daniele Forsi 6e3712f9e1 device/oprom/yabel/vbe.c: Fix memory leak
Do not allocate memory if the bootsplash was not found.
Found by Cppcheck 1.65. Fixes:
[src/device/oprom/yabel/vbe.c:734]: (error) Memory leak: decdata

Change-Id: Ie2283165c9d7650dce9baf9e892dd055d44dcce5
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6377
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 23:16:20 +02:00
Daniele Forsi f9ce88e942 device/oprom/realmode/x86.c: Fix memory leak
Do not allocate memory if the bootsplash was not found.
Found by Cppcheck 1.65. Fixes:
[src/device/oprom/realmode/x86.c:280]: (error) Memory leak: decdata

Change-Id: I8f8160d3d349c0c2b2a3ed84461729e9210153d8
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6376
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 23:13:48 +02:00
Daniele Forsi c2519e5a06 dmp/vortex86ex/southbridge.c: Do not access arrays out of bound
Found by Cppcheck 1.65. Fixes:
[src/southbridge/dmp/vortex86ex/southbridge.c:498]: (error) Array 'rtc[7]' accessed at index 7, which is out of bounds.
[src/southbridge/dmp/vortex86ex/southbridge.c:498]: (error) Array 'bin_rtc[7]' accessed at index 7, which is out of bounds.

Change-Id: I8939fe1b326202bbe2784639b0e591f8ee470eeb
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6375
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Andrew Wu <arw@dmp.com.tw>
2014-07-28 23:10:13 +02:00
Kyösti Mälkki f8e96f07d4 AGESA boards: Drop get_bus_conf.c files
The only remaining purpose for get_bus_conf() was to fill in obscure
bus_sb800 (etc.) arrays containing partial PCI bus enumeration. Complete
enumeration is available in devicetree and PCI configuration space so
discard these arrays.

Change-Id: I733115940afba3a50c58aedb9a04ecf5082b1234
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6360
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:26:47 +02:00
Kyösti Mälkki b426107d1d AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf()
Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6359
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:25:15 +02:00
Kyösti Mälkki cdfb46240b AGESA boards: Use devicetree for PCI bus enumeration
Previously MP table contained PCI_INT entries for PCI bus behind bridge
0:14.4 even if said PCI bridge function was disabled.
Remove these as invalid, indeterminate bus number could cause conflicts.

PCI_INT entries with bus_sb800[2], bus_hudson[2] and bus_yangtze[2]
were invalid as there is no PCI bridge hardware on device 0:14.0.
Remove these as invalid, indeterminate bus number could cause conflicts.

Change-Id: Ie6a3807f64c8651cf9f732612e1aa7f376a3134f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6358
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:24:48 +02:00
Kyösti Mälkki e5523b808b AGESA: Have IRQ routing in mptables
MP table should be complete with IRQ routing information even
when we have ACPI tables.

Change-Id: Ieeaed442aea6217f4477b7ac7e06a1926eec8996
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6361
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:20:52 +02:00
Kyösti Mälkki 32d9e9296e AGESA fam16kb: Move NB config fam16kb out of get_bus_conf()
Change-Id: Iedb5e1c72afe70f63f39c2dbce4896863d1d275f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6357
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:20:35 +02:00
Kyösti Mälkki 526c2fb278 AGESA: Drop some excessive agesawrapper.h includes
Change-Id: I3807912b1dc68fae8248a66e37bbe642fb92d3ae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6262
Tested-by: build bot (Jenkins)
2014-07-28 17:20:01 +02:00
Kyösti Mälkki 78d0cab36d IOAPIC: Fix missing stdint include
Change-Id: Ib26f48d3ac66788246834cdc25d97910cd79fe98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6264
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28 17:19:54 +02:00
Kyösti Mälkki b166628c30 AGESA f15tn f16kb: Fix HUDSON_XHCI_ENABLE
Control for XHCI was split to handle AMD_INIT_RESET in agesawrapper
while AMD_INIT_ENV was already handled as part of BiosCallouts.

OEM configuration is supposed to be implemented as part of BiosCallouts,
leaving agesawrapper agnostic of platform details.

TODO: S3 resume for XHCI1.

Change-Id: Id5e9c25a227db4d821f1be4b176470547ca4ea84
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6241
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-07-25 09:31:52 +02:00
Kyösti Mälkki 9248bb35ab AGESA hudson yangtze: Move IMC firmware init out of get_bus_conf()
Change-Id: I5b3cbc4d25f06a5f916760d4474621abbf826ee4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6355
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 14:00:43 +02:00
Kyösti Mälkki 0c797f1c28 AGESA: Drop offset on PCI device enumeration
Integrated PCI devices in southbridge silicon have static BDFs,
no need to have variables to store the parent bus or an offset
with constant zero.

Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6333
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 13:59:22 +02:00
Kyösti Mälkki 0ff17c9cae AGESA: Drop unused extern declarations
Change-Id: I7f681b40251f49ff717589ed5e7d7e00ee36c7c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6332
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 13:58:28 +02:00
Kyösti Mälkki f62659f643 AGESA fam15: Drop code that was commented out
Only references to bus_rd890, bus_sp5100 and bus_sr5650 were
in code sections that had been commented out.

Change-Id: If5552c409ce948c494345f49dbaad790b398bff8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6331
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 13:58:15 +02:00
Kyösti Mälkki 99c636f858 AGESA boards: Drop global bus_isa
Only ever used as lvalue (except when incrementing) so this global
is unused.

Change-Id: I616721f937eb0bfdb28f356284efd70f99ccd2dd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6330
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 13:58:00 +02:00
Kyösti Mälkki da6d8b1048 AGESA fam15: Use local bus_isa storage
Do not use a global as the value gets discarded anyway.

Change-Id: I86aac304e073f0d74b011548d079e139891ec140
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6329
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 13:57:50 +02:00
Paul Menzel 84283bcc12 intel/i945/raminit.c: Remove trailing whitespace from `printk()`
Remove a trailing whitespace after the ellipse in the debug messages in
`sdram_program_row_boundaries()`.

	Setting RAM size...
	C0DRB = 0x20202010
	C1DRB = 0x60606040
	TOLUD = 0x00c0

Change-Id: I3ee2886da6b048f509b50864bfcc21fbcb093e74
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/6300
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 12:43:48 +02:00
Elyes HAOUAS b7ea95fa8e southbridge/via: Remove trailing whitespace
Change-Id: I28deda21a7070ea6f14f973b66fd5dd119bc6225
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6345
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 12:43:06 +02:00
Elyes HAOUAS f4d1d3b986 amd/dinar & torpedo: Remove trailing whitespace
Change-Id: I4ac14c4f511eb6d56480e5167ce98b861cbed775
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6322
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 12:43:05 +02:00
Elyes HAOUAS 1631c880eb northbridge/amd: Remove trailing whitespace
Change-Id: Iccad59ebac1c47ee3fd16c0c1244b62184cfd1bf
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6316
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 12:43:04 +02:00