Commit Graph

24 Commits

Author SHA1 Message Date
Patrick Rudolph b461865577 Documentation: Add Rotundu
Add information about flash and programming header.

Change-Id: If34016e20dd580f92695bef5b67dd0c282b0b421
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-05-21 14:23:34 +00:00
Bluemax b4951c92a1 Documentation: Add MSI MS-7707
Change-Id: Iba38bda9becba9fcffb51afc4756023659f092ef
Signed-off-by: Max Blau <tripleshiftone@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-06 10:37:04 +00:00
Patrick Rudolph d18a0cbfc1 Documentation: Make lenovo codenames human readable
Use rst parser to convert the csv to markdown tables.

Change-Id: I7fd61bd7a4e8818901520311332ae4027e7a7d02
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-04-11 11:21:10 +00:00
Maxim Polyakov 1217af5e1a mainboard: Add ASRock H110M-DVS
This board is compatible with Intel Skylake and Kaby Lake generation
processors. This patch contains the minimum configuration for booting
and stable operation of the Ubuntu OS (18.04.1, Linux kernel 4.15).
It is based on Intel RVP8 mainboard.

Intel Kaby Lake FSP 3.6.0 is used to initialize CPU and PCH.
Graphics init with libgfxinit.

Works:
  - Integrated graphics (only DVI port, tested with 1920x1080);
  - PEG x16 (FSP must be configured with BCT to enable PEG);
  - all PCIe x1 slots;
  - all USB and SATA ports;
  - SuperIO COM port for console;
  - onboard audio.

TODO:
  - other SuperIO functions;
  - onboard network chip;
  - suspend and resume;
  - documentation.

Tested on Intel Core i5-6600 processor with Seabios (rel-1.12.0-10-
g171fc89) and Tianocore/edk2 (vUDK2018-8-ge6eccfc) as a payload.

Change-Id: I69396edc50948cf1d0da649241ce92171d32daf7
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-19 21:36:49 +00:00
Balazs Vinarz bc07224da5 Documentation: Add Asus F2A85-M
Change-Id: I4d195f4833ba71fdc559815cafb0f5d0d254e897
Signed-off-by: Balazs Vinarz <vinibali1@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-03-14 11:24:24 +00:00
Philipp Hug 2ef569a405 mb/qemu-riscv: update to match current qemu version
Boots again to payload not found on qemu.

Change-Id: Ie107eb882cbaac5a5a06c1ff990e7b9364377640
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/30554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-26 13:40:51 +00:00
Bill XIE 9cb2da45d8 mb/lenovo/x220: Add x1 as a variant
ThinkPad X1 ( https://www.thinkwiki.org/wiki/Category:X1 ) is nearly a
clone of X220, with additional USB3 controller on pci-e (as i7 variant
of x220), and a powered ESATA port wired to ata4 (Linux' annotation).

Documentation added.

Tested:
- CPU i5-2520M
- Slotted DIMM 8GiB
- Camera
- Mini pci-e on wlan slot
- Msata on wwan slot
- On board SDHCI connected to pci-e
- USB3 controller connected to pci-e
- NVRAM options for North and South bridges
- S3
- TPM1 on LPC
- Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from
  SeaBIOS, or Linux payload (Heads)

Not tested:
- Fingerprint reader on USB2
- Onboard USB2 interfaces (wlan slot, wwan slot)

Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-17 17:09:53 +00:00
Tristan Corrick 44095c1edc mainboard: Add Supermicro X10SLM+-F
This board runs well with coreboot. The documentation part of this
commit lists what works and what doesn't.

Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then
boots FreeBSD 11.2. It has also been tested with GRUB directly booting
Debian GNU/Linux 9.6 (kernel 4.9).

Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-29 18:26:46 +00:00
Praveen hodagatta pranesh a86c198cd5 Documentation/../../kblrvp11: Add RVP11 documentation
Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Change-Id: I01509c2fa2c127b77ae72b8b0aaac0f826b0bedd
Reviewed-on: https://review.coreboot.org/c/29859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
2018-12-19 05:51:18 +00:00
Bill XIE 012ef7735d mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
The code is based on autoport and that for T430s

Tested:
- CPU i5-3337U
- Slotted DIMM 2GiB
- Soldered RAM 4GiB from samsung (There may be more models here)
- Camera
- pci-e and usb2 on M.2 slot with A key for wlan
- sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
- On board SDHCI connected to pci-e
- USB3 ports
- libgfxinit-based graphic init
- NVRAM options for North and South bridges
- Sound
- Thinkpad EC
- S3
- TPM1 on LPC
- EHCI debug on SSP2 (USB3 port on the left)
- Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from
  Linux payload (Heads), Seabios may also work.

Not tested:
- Fingerprint reader on USB2 (not present on mine)
- Keyboard backlight (not present on mine)
- "sticky_fn" flag in nvram

Not implemented yet:
- Fn locking in nvram (may not be identical to "sticky_fn")
- C-based native graphic init (since T431s has eDP instead of LVDS)
- Detecting the model of Soldered RAM at runtime, and loading the
  corresponding SPD datum (3 observed) from CBFS (the mechanism may be
  similar to that on x1_carbon_gen1 and s230u, but I do not know how
  to find gpio ports for that, and SPD data stored in vendor firmware.)

Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-07 11:20:53 +00:00
Subrata Banik 13415333fe Documentation/../../dragonegg: Add dragonegg coreboot development documentation
Change-Id: Ia15e317557a0893d9f80cc9e87c6b90c85b93dcf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27 08:57:07 +00:00
Subrata Banik 0c273ae208 Documentation/../../icelake_rvp: Add RVP coreboot development documentation
Change-Id: If063cbd3436d9ee107945f425a31ba0009039a1d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27 08:56:49 +00:00
Patrick Rudolph 0b8aefc656 Documentation: Add W530 / T530
Change-Id: Ib253308737f8c7a497c6ca13eab88220b1ac27ad
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-11-19 09:34:38 +00:00
Arthur Heymans 0115606286 mb/intel/dg43gt: Add documentation
Change-Id: I4e9dc67e66f719d440679b11332e2c8a764024f4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-17 16:51:43 +00:00
Tristan Corrick 3693294112 mainboard: Add ASRock H81M-HDS
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with
kernel 4.9.

This board works quite well under coreboot. A list of what works and
what doesn't can be found in the documentation part of this commit.

The file `data.vbt` matches the VBT in the latest stable version of the
vendor firmware (version 2.20).

Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-11-16 10:05:26 +00:00
Jonathan Neuschäfer 84bf089f6a Documentation/mainboard: Add emulation/spike-riscv.md
Move the usage instructions from their ad-hoc place in Kconfig.name to
the Documentation directory, and expand them a bit.

Change-Id: Id6c7bbca40a21ecba00cab736af2f2662a985106
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
2018-10-29 11:19:34 +00:00
Patrick Rudolph 15d8405584 Documentation: Add basic flashing tutorial for Lenovo
* Add basic flashing tutorial
** Describe internal and external flashing
** Describe flash supply diode protection
** Gives general advices on flashing
** Describe how to use flashrom --ifd
*  Describe basic flashing on Lenovo T4xx devices
** Describe how to disassemble and access the flash IC on T4xx
** Describe flash layout on Sandy Bridge and Ivy Bridge series.

Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/27852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:20:36 +00:00
Philipp Deppenwiese 8c678cf46a mainboard/opencellular/elgon: Add mainboard support
Tested on Elgon EVT board and boots into GNU/Linux.

TODO:
* Add hard reset function for VBOOT.
* Add EC code
* Add SPI flash write protection

Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/28024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30 03:08:22 +00:00
Arthur Heymans eb2fc04c97 mb/foxconn/d41s: Add mainboard
This supports the Foxconn d41s, d42s, d51s, d52s.

The following is tested (SeaBIOS 1.12 + Linux 4.9) and works:
- COM1
- S3 resume (with SeaBIOS needs sercon disabled)
- Native graphic init on VGA output
- SATA
- USB
- Ethernet
- PS2 keyboard

The base for this mainboard port was the Intel D510MO port.

Change-Id: Ie4ec9cbf70adcdddbc2e5d805e4806825c320072
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28227
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-23 15:51:47 +00:00
Tristan Corrick 921a4cfa3f mainboard: Add ASUS P8H61-M LX
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with
kernel 4.9. This code is based on the output of autoport.

The file `data.vbt` matches the VBT in the latest version of the vendor
firmware (version 4601).

This board works well under coreboot. A list of what works and what
doesn't can be found in the documentation part of this commit. To
summarise: the only known issues are that S3 suspend/resume doesn't
work, and that there is no automatic fan control via the super I/O.

Change-Id: I2a0579f486d3a44de2dd927fa1e76b90c3b48f62
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/27798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-08-03 15:18:07 +00:00
Angel Pons 210b351df3 Documentation: Add Gigabyte to list of mainboards
Gigabyte was not in the list of vendors in the mainboard-specific
documentation. This made a newly added mainboard page difficult to
locate. This commit adds Gigabyte and links said mainboard in the
mainboard-specific documentation main page.

Change-Id: I8839e1c1176fbdc3dd9da616f68c58e8e1cf1b16
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/27045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-06-28 06:02:35 +00:00
Patrick Rudolph 8c986ab263 Documentation: Add cavium SoC and mainboard
* Add documentation for CN81XX SoC
* Add documentation for CN81XX EVB SFF mainboard
* Add documentation for BDK
* Add documentation for BOOTROM and BOOTBLOCK behaviour
* Alphabetically sort vendors

Change-Id: Ibfcd42788e31f684baed658dc3c4dfe1b8e4f354
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-19 18:09:04 +00:00
Patrick Rudolph facc08c47a Documentation: Add HP Compaq 8200 and NPCD378
Change-Id: I56db0cc11cfa5a1a537091553393542312d4f212
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26543
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-28 13:46:30 +00:00
Jonathan Neuschäfer c4b614ca15 Documentation: Add mainboard section to index
Change-Id: Ib00bd6cdd13f164ca7eb07c9092e8d8fe17d23b1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/26266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-19 17:00:06 +00:00