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coreboot-kgpe-d16/src/soc/intel/skylake
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Furquan Shaikh 70385968ce soc/intel/skylake: Bump up bootblock size to 48K 
When UART_DEBUG is enabled bootblock size grows more than the current
32K. Bump this up to 48K.

Change-Id: I580137dfdc9b4ad226c866f2b23b159bd820c62c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16317
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-24 20:02:14 +02:00
..
acpi soc/intel/skylake: Clean up SoC ASL code. 2016-08-08 18:31:38 +02:00
bootblock soc/intel/skylake: Correct Cache as ram size 2016-08-18 18:13:55 +02:00
include/soc soc/intel/skylake: Move bootblock specific code from skylake/romstage 2016-08-18 18:13:42 +02:00
nhlt soc/intel/{common,skylake}: provide common NHLT SoC support 2016-06-29 23:15:48 +02:00
romstage soc/intel/skylake: Correct Cache as ram size 2016-08-18 18:13:55 +02:00
acpi.c skylake: Add and fill out CID1 NVS field 2016-03-08 18:43:11 +01:00
chip.c skylake: Move I2C bus configuration to separate structure 2016-06-09 17:08:33 +02:00
chip.h skylake/devicetree: Add PIRQ Routing programming 2016-08-08 18:24:04 +02:00
cpu.c soc/intel/skylake: Add Kabylake device Ids 2016-08-06 04:36:46 +02:00
cpu_info.c
dsp.c skylake: Add Audio DSP device 2016-05-31 18:45:15 +02:00
elog.c soc/intel/skylake: Cleanup patch for Skylake SoC 2016-08-08 18:18:57 +02:00
finalize.c skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init 2016-08-18 06:26:40 +02:00
flash_controller.c soc/intel/skylake: make SPI support early stages 2016-08-19 03:09:49 +02:00
gpio.c soc/intel/skylake: Add function for gpio_t to ACPI pin translation 2016-07-02 01:20:02 +02:00
i2c.c skylake: Generate ACPI timing values for I2C devices 2016-07-01 18:51:51 +02:00
igd.c bootmode: Get rid of CONFIG_BOOTMODE_STRAPS 2016-07-28 00:36:22 +02:00
Kconfig soc/intel/skylake: Bump up bootblock size to 48K 2016-08-24 20:02:14 +02:00
lpc.c soc/intel/skylake: Add Kabylake device Ids 2016-08-06 04:36:46 +02:00
Makefile.inc soc/intel/skylake: align chromium Chrome OS config 2016-08-24 20:02:04 +02:00
me_status.c soc/intel/skylake: Output more ME status information 2016-05-09 08:28:37 +02:00
memmap.c soc/intel/skylake: Cleanup patch for Skylake SoC 2016-08-08 18:18:57 +02:00
monotonic_timer.c
pch.c soc/intel/skylake: Cleanup patch for Skylake SoC 2016-08-08 18:18:57 +02:00
pcie.c
pcr.c intel/skylake: Init variable so GCC knows it's set 2016-01-15 22:41:11 +01:00
pei_data.c
pmc.c soc/intel/skylake: Use init_vbnv_cmos from vboot vbnv 2016-07-28 00:41:55 +02:00
pmutil.c intel/skylake: Do not halt in poweroff if in SMM 2016-08-20 10:48:47 +02:00
ramstage.c
sd.c acpi: Change device properties to work as a tree 2016-07-08 17:21:26 +02:00
smbus.c
smbus_common.c
smi.c
smihandler.c soc/intel/skylake: use common Intel ACPI hardware definitions 2016-07-15 08:32:22 +02:00
smmrelocate.c src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
systemagent.c soc/intel/skylake: Add Kabylake device Ids 2016-08-06 04:36:46 +02:00
tsc_freq.c
uart.c
uart_debug.c drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
vr_config.c intel/skylake: provide default VR configuration 2016-01-18 12:12:12 +01:00
xhci.c