Alexandru Gagniuc 7e86cd4bb2 soc/intel: Add skeleton infrastructure for Apollolake SOC ... This is the very very minimum needed to compile the code. Change-Id: I7f9e5f564181071591a4640019f59f91a4c456c6 Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com> Reviewed-on: https://review.coreboot.org/13297 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-01-30 03:12:16 +01:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	arch/x86: Implement minimal bootblock for C_ENVIRONMENT_BOTOBLOCK	2016-01-30 03:11:46 +01:00
commonlib	chromeos: Add timestamps to measure VPD read times	2016-01-27 16:27:18 +01:00
console	console: Simplify bootblock console Kconfig selection logic	2016-01-21 05:37:27 +01:00
cpu	cpu/amd/fam10h-fam15h: Correctly create APIC ID on single node systems	2016-01-29 00:42:21 +01:00
device	arch/x86: Drop arch/pciconf.h	2016-01-26 20:22:44 +01:00
drivers	intel/skylake: Implement native Cache-as-RAM (CAR)	2016-01-29 16:56:01 +01:00
ec	ec/google/chromeec/acpi :Enable DPTF charger/TSR1/TSR2 participant.	2016-01-28 20:45:46 +01:00
include	Provide a gcc-safe zero pointer	2016-01-28 23:25:53 +01:00
lib	Provide a gcc-safe zero pointer	2016-01-28 23:25:53 +01:00
mainboard	mainboard/cubieboard: use bootblock_mainboard_early_init	2016-01-29 17:03:52 +01:00
northbridge	Revert "northbridge/intel/sandybridge: Fix random raminit failures"	2016-01-29 20:45:09 +01:00
soc	soc/intel: Add skeleton infrastructure for Apollolake SOC	2016-01-30 03:12:16 +01:00
southbridge	southbridge/amd/sb700: Add CMOS option to disable legacy USB support	2016-01-29 17:04:32 +01:00
superio	superio/winbond/w83667hg-a: Add support for W83667HG-A	2016-01-29 00:49:29 +01:00
vendorcode	src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files	2016-01-29 16:57:11 +01:00
Kconfig	Kconfig: Recommend not enabling UPDATE_IMAGE option	2016-01-22 19:22:07 +01:00