coreboot-kgpe-d16/src/soc/intel/baytrail
Aaron Durbin 0990fbf2d9 vboot: reset vbnv in cmos when cmos failure occurs
There's an occasional issue on machines which use CMOS for their
vbnv storage. The machine that just powers up from complete G3
would have had their RTC rail not held up. The contents of vbnv
in CMOS could pass the crc8 though the values could be bad. In
order to fix this introduce two functions:

1. vbnv_init_cmos()
2. vbnv_cmos_failed()

At the start of vboot the CMOS is queried for failure. If there
is a failure indicated then the vbnv data is restored from flash
backup or reset to known values when there is no flash backup.

BUG=b:63054105

Change-Id: I8bd6f28f64a116b84a08ce4779cd4dc73c0f2f3d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-09-20 23:54:42 +00:00
..
acpi soc/baytrail: fix scope for I2C ACPI devices 2017-06-12 04:07:32 +02:00
bootblock soc/intel: Unify timestamp.inc 2017-04-25 18:47:35 +02:00
include/soc soc/intel/baytrail: refactor rtc failure checking 2017-09-20 23:54:07 +00:00
romstage vboot: Remove get_sw_write_protect_state callback 2017-07-18 23:24:01 +00:00
acpi.c soc/intel: add IS_ENABLED() around Kconfig symbol references 2017-07-13 23:54:32 +00:00
chip.c
chip.h
cpu.c cpu/x86/mp_init: remove adjust_cpu_apic_entry() 2017-09-11 01:17:45 +00:00
dptf.c
ehci.c
elog.c
emmc.c
gfx.c
gpio.c
hda.c
iosf.c
Kconfig vboot: Select SoC-specific configuration for all Chrome OS boards 2017-03-28 22:12:54 +02:00
lpe.c
lpss.c
Makefile.inc soc/intel/baytrail: refactor rtc failure checking 2017-09-20 23:54:07 +00:00
memmap.c
northcluster.c soc/baytrail: fix ACPI table by recollecting TOLM 2017-06-09 16:57:13 +02:00
pcie.c src/soc: Add required space before opening parenthesis '(' 2016-08-31 20:09:42 +02:00
perf_power.c
placeholders.c
pmutil.c vboot: reset vbnv in cmos when cmos failure occurs 2017-09-20 23:54:42 +00:00
ramstage.c
refcode.c
reset.c Consolidate reset API, add generic reset_prepare mechanism 2017-06-13 20:53:09 +02:00
sata.c src/soc: Add required space before opening parenthesis '(' 2016-08-31 20:09:42 +02:00
scc.c
sd.c
smihandler.c soc/intel: add IS_ENABLED() around Kconfig symbol references 2017-07-13 23:54:32 +00:00
smm.c
southcluster.c soc/intel/baytrail: refactor rtc failure checking 2017-09-20 23:54:07 +00:00
spi.c soc/intel: Fix SPI driver compilation with CONFIG_DEBUG_SPI 2017-07-18 19:18:50 +00:00
stage_cache.c
tsc_freq.c
xhci.c