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coreboot-kgpe-d16/src/soc/intel/apollolake
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Andrey Petrov 0e46307574 soc/intel/apollolake: Work around FSP-M CAR layout 
As of now FSP-M can not be relocated and it can not be instructed
to use a specific resource for temporary memory. As result coreboot
is forced to use CAR layout dictated by default FSP-M configuration.

Change CAR size to 1MiB, link romstage at such CAR address so it
doesn't overlap with FSP-M's default heap/stack.

Change-Id: I56f78f043099dc835e294dbc081d7506bfad280d
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14804
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-18 07:05:00 +02:00
..
acpi soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds 2016-04-28 05:47:30 +02:00
bootblock Revert "soc/intel/apollolake: Enable LPC bus interface" 2016-05-06 18:54:49 +02:00
include/soc soc/intel/apollolake: provide common LPDDR4 memory init 2016-05-13 22:38:26 +02:00
acpi.c soc/intel/apollolake: use common FADT infrastructure 2016-05-12 20:06:06 +02:00
car.c soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR 2016-04-22 17:27:34 +02:00
chip.c soc/intel/apollolake: Take advantage of common opregion code 2016-05-18 07:03:44 +02:00
chip.h soc/apollolake/lpc: Allow configuring SERIRQ via devicetree 2016-05-06 18:58:31 +02:00
cpu.c soc/intel/apollolake: convert to using common MP init 2016-05-06 16:43:56 +02:00
exit_car.S soc/intel/apollolake: utilize postcar phase/stage 2016-03-23 14:24:44 +01:00
gpio.c soc/intel/apollolake: implement common gpio API 2016-05-13 17:22:53 +02:00
graphics.c soc/intel/apollolake: Take advantage of common opregion code 2016-05-18 07:03:44 +02:00
Kconfig soc/intel/apollolake: Work around FSP-M CAR layout 2016-05-18 07:05:00 +02:00
lpc.c soc/intel/apollolake: remove errant semicolon 2016-05-10 22:15:38 +02:00
lpc_lib.c soc/apollolake/lpc_lib: Add utility to configure LPC pads 2016-05-06 18:56:22 +02:00
Makefile.inc soc/intel/apollolake: provide common LPDDR4 memory init 2016-05-13 22:38:26 +02:00
meminit.c soc/intel/apollolake: provide common LPDDR4 memory init 2016-05-13 22:38:26 +02:00
memmap.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
mmap_boot.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
northbridge.c soc/intel/apollolake: fix incorrect bdsm -> tolud memory resources 2016-05-06 16:50:27 +02:00
placeholders.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
pmc.c soc/apollolake: Handle non-standard ACPI BAR in PMC device 2016-05-12 04:54:30 +02:00
pmutil.c soc/apollolake/pmutil: Get PMC base address dynamically 2016-05-09 18:35:01 +02:00
romstage.c soc/intel/apollolake: Do not use StackBase FSP-M parameter 2016-05-18 07:04:36 +02:00
spi.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
tsc_freq.c soc/intel: Update license headers 2016-04-14 16:54:33 +02:00
uart.c soc/apollolake/uart.c: Do not NOOP .set_resources() and friends 2016-05-12 04:01:58 +02:00
uart_early.c drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00