coreboot-kgpe-d16/src/mainboard/supermicro/h8dmr_fam10
Kyösti Mälkki 142b52cd32 AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes
Change-Id: Ib3a69e3364418426438f88ba14e5cf744e2414fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4524
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-12-26 23:22:17 +01:00
..
cmos.layout GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
devicetree.cb sconfig: rename lapic_cluster -> cpu_cluster 2013-02-14 07:07:20 +01:00
get_bus_conf.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
irq_tables.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Kconfig amdk8/amdfam10: Use CAR_GLOBAL for sysinfo 2012-11-28 07:45:05 +01:00
mb_sysconf.h GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
mptable.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
README Remove XIP_ROM_BASE 2011-11-01 19:06:23 +01:00
resourcemap.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
romstage.c AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes 2013-12-26 23:22:17 +01:00


There are a number of outstanding issues:

* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
disappears. This is probably not a problem related to this port specifically.

* setting CONFIG_DEFAULT_CONSOLE_LOGLEVEL lower than 8 simply hangs the boot
shortly after the warm reset triggered by the MCP55 code. I think this too
might be a toolchain problem (but I see it on gcc 3.4 as well as 4.3).

* during startup, the CPU cores talk through each other on serial for a
while. Again, not an issue specific to this port.

* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.

See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html

Ward, 2009-09-22