Rizwan Qureshi 17335fab17 soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support ... Add APIs and required parameters for creating Maxim 98927 and Realtek 5336 SSP endpoints in NHLT table. BUG=chrome-os-partner:62051 BRANCH=None TEST=check that NHLT table created is created properly Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: M Naveen <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/18213 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>		2017-02-17 19:26:15 +01:00
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acpi	soc/intel/skylake: Add SATA interrupt for APIC mode	2017-01-19 07:28:15 +01:00
bootblock	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
include	soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support	2017-02-17 19:26:15 +01:00
nhlt	soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support	2017-02-17 19:26:15 +01:00
romstage	driver/intel/fsp1_1: Fix boot failure for non-verstage case	2017-01-19 08:50:44 +01:00
acpi.c	intel/skylake: Disable FADT.8042 if NO_FADT_8042 is set	2017-02-14 00:51:21 +01:00
chip.c	soc/intel/skylake: Perform CPU MP Init before FSP-S Init	2017-02-14 19:13:03 +01:00
chip.h	soc/intel/common/lpss_i2c: simplify API and use common config structure	2016-11-11 03:11:45 +01:00
chip_fsp20.c	soc/intel/skylake: Perform CPU MP Init before FSP-S Init	2017-02-14 19:13:03 +01:00
cpu.c	intel/skylake: add function is_secondary_thread()	2017-02-17 17:46:05 +01:00
cpu_info.c
dsp.c
early_smbus.c	soc/intel/skylake: Define early smbus functions	2016-11-23 22:54:14 +01:00
elog.c
finalize.c
flash_controller.c	soc/intel/skylake: Use the new SPI driver interface	2016-12-23 04:54:35 +01:00
gpio.c	soc/intel/skylake: Remove pad configuration size hardcoding	2016-11-30 16:54:36 +01:00
i2c.c	soc/intel/common/lpss_i2c: configure buses by rise/fall times	2016-11-12 00:19:22 +01:00
igd.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
irq.c
Kconfig	soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support	2017-02-17 19:26:15 +01:00
lpc.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
Makefile.inc	soc/intel/skylake: Include I2C code in romstage	2017-01-22 19:24:37 +01:00
me.c
memmap.c	soc/intel/skylake: Fix top_of_ram calculation	2016-11-30 16:59:10 +01:00
monotonic_timer.c
opregion.c
pch.c
pcie.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
pcr.c
pei_data.c
pmc.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
pmutil.c	soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading	2016-11-07 20:39:02 +01:00
reset.c
sata.c	soc/intel/skylake: Fix SATA booting to OS issue	2016-11-07 20:11:43 +01:00
sd.c
smbus.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
smbus_common.c
smi.c	skylake: Add support for eSPI SMI events	2016-10-27 16:30:54 +02:00
smihandler.c	soc/intel/skylake: Use the new SPI driver interface	2016-12-23 04:54:35 +01:00
smmrelocate.c
spi.c	soc/intel/skylake: Add support for SPI device	2017-02-16 08:42:08 +01:00
systemagent.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
tsc_freq.c
uart.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00
uart_debug.c
vr_config.c
xhci.c	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC	2017-02-16 05:09:13 +01:00