coreboot-kgpe-d16/src
Stefan Reinauer 1943629871 selfboot: cleanup
- move cbfs_load_payload to the end so we can drop the prototype
- move lb_start and lb_end to the beginning so they can be used
  in other functions.
- drop two unused function declarations
- break a 80+ characters line
- fix a comment

Change-Id: I460aa1e2ccf9d95ac12233af001076f73ab0268e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/424
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-08 12:25:26 +01:00
..
arch/x86 Inline Makefile.bootblock.inc 2011-11-06 18:20:56 +01:00
boot selfboot: cleanup 2011-11-08 12:25:26 +01:00
console remove trailing whitespace 2011-11-01 19:07:45 +01:00
cpu remove trailing whitespace 2011-11-01 19:07:45 +01:00
devices remove trailing whitespace 2011-11-01 19:07:45 +01:00
drivers remove trailing whitespace 2011-11-01 19:07:45 +01:00
ec Lenovo H8: Fix h8_set_audio_mute() 2011-10-25 17:48:41 +02:00
include remove trailing whitespace 2011-11-01 19:07:45 +01:00
lib don't scan beyond end of CBFS 2011-11-02 10:49:24 +01:00
mainboard Added RAMINIT_SYSINFO and declared the necessary structs 2011-11-07 22:14:16 +01:00
northbridge Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26 2011-11-07 11:40:55 +01:00
pc80 Fix checksum calculation both in romstage and ramstage. 2011-10-28 09:09:40 +02:00
southbridge rename vt8237r_cfg() to k8x8xx_vt8237r_cfg() and make publicly accessible 2011-11-07 19:17:30 +01:00
superio Add code to set the clock speed for Winbond W83627THF/THG. 2011-11-07 22:12:12 +01:00
vendorcode Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 2011-10-14 22:57:11 +02:00
Kconfig refactor vesa mode setting code and bootsplash code 2011-10-13 20:00:50 +02:00
Kconfig.deprecated_options some ifdef --> if fixes 2011-04-21 20:24:43 +00:00