Lee Leahy ce9e21a0ea soc/intel/quark: Add C bootblock ... Add a bootblock which builds with C_ENVIRONMENT_BOOTBLOCK selected. This is the first piece in supporting FSP 2.0. Move esraminit from romstage into the bootblock. Replace cache_as_ram with car_stage_entry.S and code in romstage.c TEST=Build and run on Galileo Gen2 Change-Id: I14d2af2adb6e75d4bff1ebfb863196df04d07daf Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15132 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-06-12 14:52:44 +02:00
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bootblock	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
include/soc	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
romstage	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
acpi.c	soc/intel/quark: Initialize some of the FADT base registers	2016-02-29 04:59:56 +01:00
chip.c	soc/intel/quark: Add temperature sensor support	2016-05-05 17:53:54 +02:00
chip.h	soc/intel/quark: Set the UPD values for MemoryInit	2016-03-08 18:06:12 +01:00
ehci.c	soc/intel/quark: Add USB device port support	2016-05-25 00:17:34 +02:00
gpio_i2c.c	soc/intel/quark: Split I2C out from driver	2016-05-31 22:07:49 +02:00
i2c.c	soc/intel/quark: Split I2C out from driver	2016-05-31 22:07:49 +02:00
Kconfig	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
lpc.c	soc/intel/quark: Clear SMI interrupts and wake events	2016-05-31 21:57:55 +02:00
Makefile.inc	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
memmap.c	soc/intel/quark: Enable ESRAM	2016-02-08 20:15:05 +01:00
northcluster.c	soc/intel/quark: Reserve non-MMIO space	2016-02-29 05:00:27 +01:00
reg_access.c	soc/intel/quark: Fix reg_script display	2016-05-31 21:59:47 +02:00
tsc_freq.c	soc/intel/quark: Enable Serial Port	2016-02-09 16:20:38 +01:00
uart.c	soc/intel/quark: Use single ID value for HSUART1	2016-02-19 20:24:22 +01:00
uart_common.c	soc/intel/quark: Enable HSUART1	2016-02-18 20:36:53 +01:00