Furquan Shaikh 1f40ae2d74 intel/apollolake: Correct the offsets in gnvs ... Offsets start from 0 instead of 1. Fix this in the gnvs definitions. BUG=chrome-os-partner:54342 Change-Id: Id6766a8766ef430d19ffcb801bfab43d38de37db Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15180 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)		2016-06-15 18:47:34 +02:00
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apollolake	intel/apollolake: Correct the offsets in gnvs	2016-06-15 18:47:34 +02:00
baytrail	soc/intel: indicate to build system that XIP_ROM_SIZE isn't used	2016-05-06 16:50:00 +02:00
braswell	soc/intel: indicate to build system that XIP_ROM_SIZE isn't used	2016-05-06 16:50:00 +02:00
broadwell	{cpu,soc}/intel: remove unused smm_init() function	2016-05-06 16:48:21 +02:00
common	soc/intel/common: don't infinitely recurse in busmaster_disable_on_bus()	2016-06-12 12:55:57 +02:00
fsp_baytrail	intel/fsp_baytrail/i2c: mask i2c interrupts in i2c_init()	2016-06-03 04:54:32 +02:00
fsp_broadwell_de	soc/intel/fsp_broadwell_de: convert to using common MP init	2016-05-06 16:41:01 +02:00
quark	soc/intel/quark: Add C bootblock	2016-06-12 14:52:44 +02:00
sch	intel/sch: Merge northbridge and southbridge in src/soc	2016-05-17 21:38:17 +02:00
skylake	skylake: Support common LPSS I2C driver	2016-06-09 18:40:02 +02:00