coreboot-kgpe-d16/src/cpu/intel/haswell
Jeremy Compostella 2c021383c0 cpu/intel/haswell: Allow up to six microcodes in the FIT table
Haswell and Broadwell platforms usually stitch six microcode
patches. It has worked so far with the default value of four thanks a
bug which is being fixed by `util/ifittool: Error out if microcodes do
not fit the FIT table' commit.

BUG=b:245380705
TEST=Jenkins build without failing on the FIT table size

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I23bf79a3e8918499f6c51e6ef829312d5872181a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67466
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-09-15 13:01:13 +00:00
..
acpi.c cpu: Get rid of unnecessary blank line {before,after} barce 2022-07-17 18:57:54 +00:00
bootblock.c
chip.h
finalize.c
haswell.h
haswell_init.c cpu/intel: Remove unused <acpi/acpi.h> 2022-04-24 18:28:37 +00:00
Kconfig cpu/intel/haswell: Allow up to six microcodes in the FIT table 2022-09-15 13:01:13 +00:00
Makefile.inc cpu/x86: Introduce and use CPU_X86_LAPIC 2021-10-26 17:44:14 +00:00
romstage.c
smmrelocate.c