Angel Pons 2c03ffc8df mb/*: Specify type of MAINBOARD_PART_NUMBER once ... Specify the type of the `MAINBOARD_PART_NUMBER` Kconfig symbol once instead of doing so on each and every mainboard. Change-Id: I3692f9e82fe90af4d0da1d037018a20aa1b45793 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56554 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-07-26 14:05:29 +00:00
..
spd	mb/intel/shadowmountain: Add the romstage code	2021-02-22 05:46:58 +00:00
variants/baseboard	mb/intel/sm: Skip FSP to program UART0	2021-06-23 09:08:50 +00:00
board_info.txt
bootblock.c	mb/intel/shadowmountain: Add bootblock and verstage code	2021-02-06 09:09:16 +00:00
chromeos.c	mb/intel/shadowmountain: Add bootblock and verstage code	2021-02-06 09:09:16 +00:00
chromeos.fmd	mb/intel/shadowmountain: Add flash layout	2021-01-28 03:11:35 +00:00
dsdt.asl	mb/intel/shadowmountain: Add the ASL code	2021-02-27 09:40:57 +00:00
ec.c	mb/intel/shadowmountain: Add the ramstage code	2021-02-27 09:40:47 +00:00
Kconfig	mb/*: Specify type of MAINBOARD_PART_NUMBER once	2021-07-26 14:05:29 +00:00
Kconfig.name
mainboard.c	mb/intel/shadowmountain: Add the ramstage code	2021-02-27 09:40:47 +00:00
Makefile.inc	mb/intel/shadowmountain: Add the ramstage code	2021-02-27 09:40:47 +00:00
romstage.c	soc/intel/alderlake: Update mainboard_memory_init_params() argument	2021-06-24 07:55:12 +00:00
smihandler.c	mb/intel/shadowmountain: Add the ramstage code	2021-02-27 09:40:47 +00:00