3ba2c1a63e
While FORCE_PWR is set high, it prevents retimer from entering low power state. S0ix failure occurs while USB4 Gatkex is connected on Port-0. This change sets FORCE_PWR(GPP_H10) low. This FORCE_PWR GPIO will be toggled by kernel through DSM method while updating retimer firmware. BUG=b:174166586 Cq-Depend: chromium:2594438 TEST=Verifed s0ix cycles with USB4 Gatkex connected on Port-0. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ie4b442e1078379c522a94bfdc00cd99e6f9b8170 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> |
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.. | ||
spd | ||
variants | ||
board_info.txt | ||
bootblock.c | ||
chromeos.c | ||
chromeos.fmd | ||
dsdt.asl | ||
ec.c | ||
fw_config.c | ||
Kconfig | ||
Kconfig.name | ||
mainboard.asl | ||
mainboard.c | ||
Makefile.inc | ||
romstage.c | ||
smihandler.c |