coreboot-kgpe-d16/src/soc
Furquan Shaikh 3bfe3404df intel/skylake: Add support to enable wake-on-usb attach/detach
Three things are required to enable wake-on-usb:
1. 5V to USB ports should be enabled in S3.
2. ASL file needs to have appropriate wake bit set.
3. XHCI controller should have the wake on attach/detach bit set for the
corresponding port in PORTSCN register.

Only part missing was #3.

This CL adds support to allow mainboard to define a bitmap in
devicetree corresponding to the ports that it wants to enable
wake-on-usb feature. Based on the bitmap, wake on attach/detach bits in
PORTSCN would be set by xhci.asl for the appropriate ports.

BUG=chrome-os-partner:58734
BRANCH=None
TEST=Verified that with port 5 enabled, chell wakes up from S3 on usb
attach/detach.

Change-Id: I40a22a450e52f74a0ab93ebb8170555d834ebdaf
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17056
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-26 08:33:37 +02:00
..
broadcom/cygnus soc/broadcom/cygnus/ddr_init.c: Correct typo in POWER ON and POWER OK. 2016-08-31 20:23:34 +02:00
dmp/vortex86ex src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
imgtec/pistachio drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
intel intel/skylake: Add support to enable wake-on-usb attach/detach 2016-10-26 08:33:37 +02:00
lowrisc/lowrisc riscv: add the lowrisc System On Chip support 2016-10-25 22:31:06 +02:00
marvell marvell/mvmap2315: Compose BOOTBLOCK region 2016-10-21 19:42:23 +02:00
mediatek/mt8173 src/soc: Add required space before opening parenthesis '(' 2016-08-31 20:09:42 +02:00
nvidia Makefiles: update cbfs types from bare numbers to values 2016-09-21 09:36:11 +02:00
qualcomm soc/qualcomm/ipq40xx: Fix GPIO pull up config. 2016-10-07 17:55:19 +02:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip rockchip/rk3399: reset system if DDR init fails 2016-10-25 17:08:58 +02:00
samsung src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
ucb/riscv soc/ucb/riscv: select BOOTBLOCK_CONSOLE 2016-08-15 18:24:42 +02:00