coreboot-kgpe-d16/src/soc/amd/stoneyridge
Kyösti Mälkki 6962b6ecd3 sb,soc/amd: Move _PIC method to global scope
Fix regression with commit aa969e887a ACPI: Move PICM declaration.

While mentioned in the commit message there already, the default
value for AMD boards changed from IOAPIC mode to PIC mode.

ACPI 6.3 spec has this text regarding _PIC method:

  If the platform CPU architecture supports PIC mode and the method
  is never called, the platform runtime firmware must assume PIC mode.

If MADT has IOAPIC entries, OS will want to change to APIC model. But
the method _PIC was not in the global scope so it could not be called
and therefore _PRT continued to report PIC model interrupt routing.

Already fixed for soc/amd/picasso in commit 839f668.

Change-Id: I7f3bb0d45946cec315694de1d540fea4d828348e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2021-02-14 19:21:03 +00:00
..
acpi sb,soc/amd: Move _PIC method to global scope 2021-02-14 19:21:03 +00:00
include/soc soc/amd: Move southbridge_write_acpi_tables 2021-02-12 20:44:48 +00:00
acpi.c soc/amd: introduce and use common IOAPIC IDs 2021-02-13 20:57:23 +00:00
BiosCallOuts.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
bootblock.c soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UART 2021-01-14 15:00:55 +00:00
chip.c soc/amd/stoneyridge: drop empty sb_enable 2021-02-11 00:46:12 +00:00
chip.h soc/amd/stoneyridge: remove unused config_t typedef 2020-12-06 19:02:42 +00:00
cpu.c soc/amd: factor out common SMM relocation code 2021-02-11 01:44:24 +00:00
enable_usbdebug.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
finalize.c src: Remove unused '#include <timer.h>' 2020-06-02 07:39:05 +00:00
fw_cz.cfg soc/amd: Change FIRMWARE_LOCATE to FIRMWARE_LOCATION 2020-11-04 09:42:18 +00:00
fw_st.cfg soc/amd: Change FIRMWARE_LOCATE to FIRMWARE_LOCATION 2020-11-04 09:42:18 +00:00
gpio.c soc/amd: Move soc_route_sci to common/blocks/smi/smi_util 2021-02-10 01:31:28 +00:00
i2c.c soc/amd/common: Refactor ACPIMMIO posted writes 2020-12-12 19:48:49 +00:00
Kconfig soc/amd: select ACPI_AMD_HARDWARE_SLEEP_VALUES in common ACPI code 2021-02-12 14:39:30 +00:00
Makefile.inc soc/amd: include cpu/x86/smm directory in common SMM Makefile 2021-02-11 02:46:41 +00:00
mca.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
memmap.c soc/amd: fully commonize clear_tvalid 2021-02-11 02:49:34 +00:00
monotonic_timer.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
northbridge.c soc/amd: introduce and use common IOAPIC IDs 2021-02-13 20:57:23 +00:00
psp.c soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contents 2021-01-31 01:12:18 +00:00
reset.c soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.h 2020-12-10 16:00:55 +00:00
romstage.c soc/amd/stoneyridge: Create chipset_power_state in romstage 2021-02-06 07:17:05 +00:00
sata.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
smbus_spd.c soc/amd/common: Refactor SMBus base arguments 2020-12-15 18:50:13 +00:00
smihandler.c soc/amd/*/smihandler: use size_t and unsigned int 2021-02-11 16:17:15 +00:00
southbridge.c soc/amd/stoneyridge: drop empty sb_enable 2021-02-11 00:46:12 +00:00
tsc_freq.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
uart.c soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UART 2021-01-14 15:00:55 +00:00
usb.c src: Use pci_dev_ops_pci where applicable 2020-06-06 20:36:51 +00:00