Lee Leahy 4c18de2de9 soc/intel/common: Enable MTRR display during bootblock & postcar ... Update Makefile.inc to allow MTRR display during bootblock and postcar. TEST=Build and run on Galileo Gen2 Change-Id: If12896df46b9edfc9fff3fab3a12d2dae23517a3 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15990 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>		2016-08-01 06:16:05 +02:00
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acpi	src/acpi: Capitalize ACPI and SATA	2016-07-31 19:25:40 +02:00
arch	src/arch: Capitalize CPU, RAM and ROM	2016-07-31 18:35:09 +02:00
commonlib	cbmem: share additional time stamps IDs	2016-07-20 22:09:24 +02:00
console	skylake/mainboard: Define mainboard hook in bootblock	2016-07-28 05:17:03 +02:00
cpu	src/cpu: Capitalize CPU	2016-07-31 18:33:06 +02:00
device	src/device: Capitalize CPU, RAM and ROM	2016-07-31 18:33:30 +02:00
drivers	src/drivers: Capitalize CPU, RAM and ACPI	2016-07-31 19:29:22 +02:00
ec	build system: really disable building CrEC when not needed	2016-07-31 18:39:20 +02:00
include	src/include: Capitalize CPU, RAM and ROM	2016-07-31 18:30:16 +02:00
lib	src/lib: Capitalize ROM, RAM, NVRAM and CPU	2016-07-31 19:30:54 +02:00
mainboard	mainboard/bap/ode_e20XX: Enable UART 3/4 in devicetree	2016-07-31 20:00:47 +02:00
northbridge	src/northbridge: Capitalize CPU, RAM and ROM	2016-07-31 18:28:48 +02:00
soc	soc/intel/common: Enable MTRR display during bootblock & postcar	2016-08-01 06:16:05 +02:00
southbridge	sis/sis966: fix typo	2016-07-31 19:20:27 +02:00
superio	superio/nuvoton: Add Nuvoton NCT6791D	2016-07-31 19:42:49 +02:00
vboot	src/vboot: Capitalize RAM and CPU	2016-07-31 19:31:41 +02:00
vendorcode	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
Kconfig	src/Kconfig: Capitalize ROM	2016-07-31 18:34:16 +02:00