coreboot-kgpe-d16/src/soc/intel
Arthur Heymans 4d56a06255 nb/intel/broadwell: Add an option for where verstage starts
Previously broadwell used a romcc bootblock and starting verstage in
romstage was madatory but with C_ENVIRONMENT_BOOTBLOCK it is also
possible to have a separate verstage.

This selects using a separate verstage by default but still keeps the
option around to use verstage in romstage.

With a separate verstage the romstage becomes an RW stage.
The mrc.bin however is only added to the RO COREBOOT fmap region as it
requires to be run at a specific offset. This means that coreboot will
have to jump from a RW region to the RO region for that binary and
back to that RW region after that binary is done initializing the
memory.

Change-Id: I900233cadb3c76da329fb98f93917570e633365f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30384
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-15 17:57:18 +00:00
..
apollolake soc/intel: Geminilake Refresh feature request support 2019-05-13 09:23:13 +00:00
baytrail vboot: refactor OPROM code 2019-04-30 21:47:25 +00:00
braswell soc/intel/braswell: Remove unused include <timestamp.h> 2019-05-13 09:13:29 +00:00
broadwell nb/intel/broadwell: Add an option for where verstage starts 2019-05-15 17:57:18 +00:00
cannonlake soc/intel/cannonlake: Support different SPD read type for each slot 2019-05-15 17:47:13 +00:00
common soc/intel: Geminilake Refresh feature request support 2019-05-13 09:23:13 +00:00
denverton_ns soc/intel: Add GPI interrupt config register offset info 2019-04-29 12:18:27 +00:00
fsp_baytrail {bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macro 2019-05-13 09:30:54 +00:00
fsp_broadwell_de soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
icelake soc/intel/{cannonlake,icelake}: Drop unused cbmem.c file 2019-05-13 09:31:14 +00:00
quark soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
skylake soc/intel/skylake: remove PrimaryDisplay check 2019-05-07 16:03:01 +00:00
Kconfig