GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
coreboot-kgpe-d16/src
History
Varadarajan Narayanan 4df1e0a2da google/gale: Enable Giga Device SPI flash support 
BUG=chrome-os-partner:49249
TEST=Able to read content from SPI NOR, with boards having Giga Device SPI Flash
BRANCH=none

Change-Id: I67dc981a8c0270d55b01bdc4506139cccd8e90a7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 417701816e8a298ba999d2c2d0d058cf7b54fb6f
Original-Change-Id: Id09ef68b13c53a2ab44f77c12dad39b505c81071
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333320
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14661
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
 		2016-05-10 21:50:12 +02:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch smbios: Add SuperTalent SPD ID 2016-05-09 20:43:50 +02:00
commonlib coreboot_tables: Extend serial port description 2016-05-09 17:21:22 +02:00
console arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
cpu drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
device payloads: add iPXE 'payload' build 2016-04-13 17:45:37 +02:00
drivers drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
ec ec/google/chromeec/acpi: Add GOOG0004 to load cros_ec_lpc dynamically. 2016-05-09 08:31:15 +02:00
include drivers/uart: Enable override for input clock divider 2016-05-09 18:44:47 +02:00
lib coreboot_tables: Extend serial port description 2016-05-09 17:21:22 +02:00
mainboard google/gale: Enable Giga Device SPI flash support 2016-05-10 21:50:12 +02:00
northbridge nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structure 2016-05-09 20:44:11 +02:00
soc soc/qualcomm/ipq40xx: Return NULL for cbmem_top if DRAM is not initialized 2016-05-10 21:49:08 +02:00
southbridge drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
superio superio/smsc/mec1308: Fix AddressMax value for SMBX mailbox 2016-04-13 23:39:28 +02:00
vendorcode AGESA boards: Relocate platform memory config 2016-05-10 13:47:08 +02:00
Kconfig lib/prog_loaders: Allow platforms to skip stage cache 2016-05-09 05:02:22 +02:00