Arthur Heymans c1abf137ff Documentation/4.12-relnotes.md: Add SMMSTORE as production ready ... Change-Id: I9fa0473dd8ab9d0476400fc2f40c684db0188fc3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37244 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-11-29 08:58:07 +00:00
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Intel	…
RFC	…
_static	…
acpi	…
arch	arch/riscv: Pass cbmem_top to ramstage via calling argument	2019-11-10 11:46:10 +00:00
community	…
contributing	Remove MIPS architecture	2019-11-20 10:10:48 +00:00
doxygen	…
drivers	Documentation: Add SMMSTORE documentation	2019-11-29 08:58:01 +00:00
flash_tutorial	…
getting_started	Documentation/writing_documentation.md: Explain how to use docker	2019-10-27 23:36:07 +00:00
gfx	…
ifdtool	…
lib	Documentation: trivial typo fix strcut/struct	2019-10-24 16:27:47 +00:00
mainboard	Documentation: Remove duplicated entry	2019-11-19 13:47:07 +00:00
northbridge	…
releases	Documentation/4.12-relnotes.md: Add SMMSTORE as production ready	2019-11-29 08:58:07 +00:00
security	lib/cbfs: Add fallback to RO region to cbfs_boot_locate	2019-11-07 14:12:00 +00:00
soc	docs: intel fsp: add memory retraining bug on SPS systems	2019-11-19 12:56:10 +00:00
superio	…
technotes	Documentation: Add a technote section	2019-10-23 14:22:58 +00:00
tutorial	Documentation: Rework staging and commit information	2019-11-28 10:49:30 +00:00
vendorcode	…
AMD-S3.txt	…
COPYING	…
Doxyfile.coreboot	…
Doxyfile.coreboot_simple	…
Makefile	…
Makefile.sphinx	…
POSTCODES	…
beginverbatim.tex	…
cbfs.txt	…
codeflow.svg	…
coding_style.md	…
conf.py	…
corebootBuildingGuide.tex	…
coreboot_logo.png	…
distributions.md	…
endverbatim.tex	…
gcov.txt	…
hypertransport.svg	…
index.md	Documentation: Add a technote section	2019-10-23 14:22:58 +00:00
mainboard_io_trap_handler_sample.c	…
payloads.md	…
util.md	Remove imgtec/pistachio SoC	2019-11-20 10:10:44 +00:00