coreboot-kgpe-d16/src/soc/intel/cannonlake
Michael Niewöhner 50a1072180 soc/intel/cnl: replace the remains of HeciEnabled by device state in dt
The option `HeciEnabled` was partly replaced by use of the device on/off
state in the devicetree in commit 3de90d1. The option has been removed
from the corresponding boards, so `HeciEnabled` is always 0 and ME
always gets disabled during soc finalize, when `HECI_DISABLE_USING_SMM`
is set.

Replace the option in the finalize function by the same dt state check
that sets the FSP option and drop the remaints of `HeciEnabled`.

Devicetrees still having `HeciEnabled` have been adapted to keep the
current behaviour.

Change-Id: Ib4cca9099b9aa3434552a41fbafca7cf6a0dd0eb
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47195
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-13 22:30:29 +00:00
..
acpi soc/intel/cannonlake: Align cosmetics with Ice Lake 2020-10-12 20:59:17 +00:00
bootblock src/soc/intel: Drop unneeded empty lines 2020-09-21 16:15:25 +00:00
include/soc {cpu,soc}/intel: deduplicate cpu code 2020-10-24 09:46:45 +00:00
romstage soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num() 2020-10-05 18:03:22 +00:00
acpi.c soc/intel/cannonlake: Fix DMAR when no iGPU is present 2020-07-31 09:42:16 +00:00
chip.c soc/intel/common/block/lpc: add acpi name 2020-09-28 09:38:39 +00:00
chip.h soc/intel/cnl: replace the remains of HeciEnabled by device state in dt 2020-11-13 22:30:29 +00:00
cnl_memcfg_init.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpu.c soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
elog.c elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE 2020-08-18 15:57:40 +00:00
finalize.c soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling 2020-11-13 17:18:20 +00:00
fsp_params.c soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig 2020-11-13 17:32:37 +00:00
gpio.c soc/intel/cannonlake: add missing special function pads 2020-09-17 21:53:38 +00:00
gpio_cnp_h.c soc/intel/cannonlake: add missing special function pads 2020-09-17 21:53:38 +00:00
gpio_common.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
gspi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
i2c.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig 2020-11-13 17:32:37 +00:00
lockdown.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
lpc.c soc/intel: Move pch_misc_init() to common code 2020-10-03 04:19:00 +00:00
Makefile.inc soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code 2020-05-27 21:35:43 +00:00
me.c soc/intel/cannonlake: Align cosmetics with Ice Lake 2020-10-12 20:59:17 +00:00
nhlt.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
p2sb.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmc.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmutil.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
reset.c soc/intel: Use of common reset code block 2020-11-02 10:43:53 +00:00
sd.c soc/intel/cannonlake: Align cosmetics with Ice Lake 2020-10-12 20:59:17 +00:00
smihandler.c soc/intel/cnl: replace the remains of HeciEnabled by device state in dt 2020-11-13 22:30:29 +00:00
smmrelocate.c src/soc/intel: Drop unneeded empty lines 2020-09-21 16:15:25 +00:00
spi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
systemagent.c soc/intel/common: Improve Type16 SMBIOS tables 2020-05-28 06:26:53 +00:00
uart.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
vr_config.c src/soc/intel: Drop unneeded empty lines 2020-09-21 16:15:25 +00:00
xhci.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00