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coreboot-kgpe-d16/src/mainboard/google/beltino
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Matt DeVillier 3044af7adc mb/google,samsung/*: Add LPC TPM chip driver to devicetree 
With commits 9987534 [southbridge/intel: Remove leftover TPM ACPI code]
and 66ce18c [soc/intel: Remove legacy static TPM asl code] removing
TPM ASL code from the southbridge's LPCB device, the LPC TPM chip driver
(drivers/pc80/tpm) must be added to devicetree in order to ensure the
new acpigen code is used to replace it.

Test: boot various google/samsung boards, verify SSDT created with 
LPBC.TPM device and TPM visible to and usable by SeaBIOS and Linux

Change-Id: Iedaa01f26fb357914549bb3dda24b0bd6ef67480
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27786
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-01 22:23:54 +00:00
..
acpi mb/google/x86-boards: Get rid of power button device in coreboot 2018-07-25 18:52:40 +00:00
variants mb/google: Get rid of whitespace before tab 2018-06-04 09:01:25 +00:00
acpi_tables.c mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references 2017-07-06 00:19:56 +00:00
board_info.txt
chromeos.c mainboard: Get rid of device_t 2018-06-09 17:24:07 +00:00
chromeos.fmd
cmos.layout mb/*/*/cmos.layout: Fix the values for the console level 2018-01-26 17:28:56 +00:00
devicetree.cb mb/google,samsung/*: Add LPC TPM chip driver to devicetree 2018-08-01 22:23:54 +00:00
dsdt.asl intel bd82x6x/lynxpoint systems: Update ACPI thermal zone handler 2018-06-03 14:19:58 +00:00
fadt.c acpi: fix FADT header version for ChromeOS devices 2017-05-01 01:08:18 +02:00
Kconfig security/tpm: Unify the coreboot TPM software stack 2018-06-04 20:33:07 +00:00
Kconfig.name mainboard/google: Comment variant names in Kconfig 2018-05-04 01:03:49 +00:00
lan.c
mainboard.c mb/google: Get rid of device_t 2018-05-08 18:31:26 +00:00
Makefile.inc Update files with no newline at the end 2017-07-24 15:08:16 +00:00
onboard.h mb/superio: Rename global control devices as SUPERIO_DEV 2018-05-08 14:18:36 +00:00
romstage.c cpu/intel/haswell: Use the common intel romstage_main function 2018-06-14 10:01:35 +00:00
smihandler.c