Subrata Banik 281e2c1987 soc/intel/common/thermal: Refactor thermal block to improve reusability ... This patch moves common thermal API between chipsets with thermal device as PCI device and thermal device behind PMC into common file (thermal_common.c). Introduce CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV to let SoC Kconfig to select as applicable for underlying chipset. +------------------------------------------------------+--------------+ | Thermal Kconfig | SoC | +------------------------------------------------------+--------------+ | CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV | SKL/KBL, CNL | | | till ICL | +------------------------------------------------------+--------------+ | CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC | TGL onwards | | | ICL | +------------------------------------------------------+--------------+ Either of these two Kconfig internally selects CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL to use common thermal APIs. BUG=b:193774296 TEST=Able to build and boot hatch and adlrvp platform. Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-11-25 07:18:04 +00:00
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acpi	soc/intel/{skl,apl}: don't run or even include SGX code if disabled	2021-10-20 15:42:51 +00:00
bootblock	soc/intel/skylake: Make use of `cpu/intel/cpu_ids.h'	2021-07-17 09:50:44 +00:00
include/soc	soc/skylake: Make VT-d controllable from CMOS option	2021-10-18 12:32:43 +00:00
nhlt
romstage	skylake: Default to BOARD_TYPE_DESKTOP for PCH-H	2021-09-03 00:12:37 +00:00
acpi.c	soc/intel: generate SSDT instead of using GNVS for SGX	2021-11-09 16:02:19 +00:00
chip.c	soc/skylake: Make VT-d controllable from CMOS option	2021-10-18 12:32:43 +00:00
chip.h	soc/intel/skylake: Drop dead ScanExtGfxForLegacyOpRom	2021-07-14 08:16:50 +00:00
chipset.cb	soc/intel/skylake: Set proper defaults in chipset devicetree	2021-05-10 14:14:24 +00:00
cpu.c	cpu/x86/mp_init: move printing of failure message into mp_init_with_smm	2021-10-22 01:27:07 +00:00
elog.c	soc/intel/*: Update data types for variables holding PCH_DEVFN_* macros	2021-05-03 16:28:53 +00:00
fadt.c	soc/intel/skylake: switch to common ACPI code	2021-10-17 17:27:43 +00:00
finalize.c	Move post_codes.h to commonlib/console/	2021-08-04 15:15:51 +00:00
gpio.c
graphics.c	soc/intel: Replace bad uses of find_resource	2021-11-04 17:34:30 +00:00
gspi.c
i2c.c
irq.c
Kconfig	soc/intel/common/thermal: Refactor thermal block to improve reusability	2021-11-25 07:18:04 +00:00
lockdown.c
lpc.c	soc/intel/skylake: Drop reg-script usage	2021-09-29 21:22:38 +00:00
Makefile.inc	Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"	2021-11-15 12:00:12 +00:00
me.c	soc/intel/skylake: Always print ME FW SKU	2021-03-03 09:05:19 +00:00
p2sb.c
pmc.c	soc/intel/{skl,cnl,dnv}: disable PM ACPI timer if chosen	2021-10-17 13:58:15 +00:00
pmutil.c	soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c	2021-04-21 09:17:40 +00:00
reset.c
sd.c	soc/intel/skylake: Clean up SD GPIO handling	2021-03-01 19:37:36 +00:00
smihandler.c
spi.c
systemagent.c	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
uart.c	soc/intel/*: drop UART pad configuration from common code	2021-03-12 08:48:03 +00:00
vr_config.c
xhci.c