coreboot-kgpe-d16/src/soc/intel/alderlake
Maulik V Vaghela afb143dadb soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M
Added new LPC and IGD device IDs for Alderlake M.
Also, added entry for CPUID_ALDERLAKE_M_A0 in report_platform.c

TEST=Check if platform information print is coming properly in coreboot

Change-Id: If33c43da8cbd786261b00742e342f0f01622c607
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50138
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-06 07:51:05 +00:00
..
acpi soc/intel/alderlake: Update variable SD3C to only track enabled devices 2021-04-06 07:04:26 +00:00
bootblock soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M 2021-04-06 07:51:05 +00:00
include/soc soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h 2021-03-27 04:23:12 +00:00
romstage soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstage 2021-03-17 08:01:14 +00:00
spd util: Add new memory part to LP4x list 2021-03-03 15:50:47 +00:00
acpi.c soc/intel: Factor out identical acpigen GPIO helpers 2021-03-01 19:37:56 +00:00
chip.c soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h 2021-03-27 04:23:12 +00:00
chip.h soc/intel/alderlake: add processor power limits control support 2021-03-28 16:08:02 +00:00
chipset.cb soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device 2021-03-15 06:25:20 +00:00
cpu.c src: Remove unused <arch/cpu.h> 2021-02-11 10:25:23 +00:00
elog.c soc/intel/alderlake: Log internal device wake events 2021-03-03 09:04:12 +00:00
espi.c soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring 2021-01-25 09:06:10 +00:00
finalize.c
fsp_params.c soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entry 2021-03-15 06:24:48 +00:00
gpio.c soc/intel/alderlake: Correct GPE DWx assignment as per EDS 2021-03-27 04:22:11 +00:00
gspi.c
i2c.c
Kconfig soc/intel/alderlake: add processor power limits control support 2021-03-28 16:08:02 +00:00
lockdown.c
Makefile.inc soc/intel/alderlake: Enable logging of wake sources for S0ix 2021-03-30 15:37:18 +00:00
me.c
meminit.c soc/intel/alderlake: Add provision to override Rcomp settings 2021-03-26 04:53:18 +00:00
p2sb.c
pcie_rp.c soc/intel/alderlake: Update PCH and CPU PCIe RP table 2021-01-18 07:28:51 +00:00
pmc.c
pmutil.c soc/intel/*/pmutil.c: Align cosmetics across platforms 2021-02-24 11:34:42 +00:00
reset.c
smihandler.c
soundwire.c
spi.c
systemagent.c soc/intel/alderlake: add processor power limits control support 2021-03-28 16:08:02 +00:00
uart.c soc/intel/*: drop UART pad configuration from common code 2021-03-12 08:48:03 +00:00
xhci.c soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog support 2021-02-24 11:27:51 +00:00