Sridhar Siricilla 59c7cb7d37 soc/intel/common: Check prerequisites for GLOBAL_RESET command ... Check prerequisites before sending GLOBAL RESET command to CSE. TEST=Verified on hatch. Change-Id: Ia583e4033f15ec20e942202fa78e7884cf370ce4 Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38800 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-03-15 13:10:59 +00:00
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apollolake	soc/intel/*/smihandler: Only compile in TCO SMI handler if needed	2020-03-12 21:36:20 +00:00
baytrail	src: capitalize 'PCIe'	2020-03-04 15:43:30 +00:00
braswell	soc/intel/braswell/chip.h: Include smbios.h for Type9 Entries	2020-03-09 11:03:41 +00:00
broadwell	src: capitalize 'PCIe'	2020-03-04 15:43:30 +00:00
cannonlake	soc/intel/*/smihandler: Only compile in TCO SMI handler if needed	2020-03-12 21:36:20 +00:00
common	soc/intel/common: Check prerequisites for GLOBAL_RESET command	2020-03-15 13:10:59 +00:00
denverton_ns	soc/intel/dnv: Set INT_LINE accouting for PIRQ routing & swizzling	2020-03-10 20:45:53 +00:00
icelake	soc/intel/icelake: Re-flow comment for 96 characters	2020-03-15 12:57:02 +00:00
quark	soc/intel: Add get_pmbase	2020-02-04 18:54:01 +00:00
skylake	soc/intel/*/smihandler: Only compile in TCO SMI handler if needed	2020-03-12 21:36:20 +00:00
tigerlake	soc/intel/tigerlake: Match RP number with TGL EDS	2020-03-15 12:56:21 +00:00
xeon_sp	soc/intel/xeon-sp,mb/ocp/tiogapass: Don't fake binaries	2020-03-10 11:52:45 +00:00
Kconfig	soc/intel: Add Intel Xeon Scalable Processor support	2020-03-06 08:19:59 +00:00