coreboot-kgpe-d16/src/soc/intel
Michael Niewöhner 60795784b7 soc/intel/cannonlake: fix GPIO community numbering in ACPI
This corrects the GPIO community numbers in CNL-LP ACPI code.

Change-Id: I9f13a28d3e8f427859570a4d209304ae8444efd9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45209
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-17 10:36:31 +00:00
..
alderlake soc/intel/alderlake/romstage: Do initial SoC commit till romstage 2020-09-15 15:13:50 +00:00
apollolake apollolake: Define MAX_CPUS at SoC scope 2020-09-09 10:35:34 +00:00
baytrail soc/intel/baytrail: Add missing GSM size definitions 2020-09-08 05:34:55 +00:00
braswell SMM: Validate more user-provided pointers 2020-08-21 07:51:07 +00:00
broadwell soc/intel/broadwell: Drop gpu_panel_port_select 2020-09-08 05:26:25 +00:00
cannonlake soc/intel/cannonlake: fix GPIO community numbering in ACPI 2020-09-17 10:36:31 +00:00
common soc/intel/common/block/chip: Refactor chip_get_common_soc_structure() 2020-09-17 09:57:06 +00:00
denverton_ns soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode 2020-09-14 07:02:26 +00:00
elkhartlake soc/intel/elkhartlake: Update SA & PM related definitions 2020-09-08 05:30:44 +00:00
icelake soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h 2020-09-14 12:06:39 +00:00
jasperlake soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h 2020-09-14 12:06:39 +00:00
quark include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
skylake soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode 2020-09-14 07:02:26 +00:00
tigerlake soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h 2020-09-14 12:06:39 +00:00
xeon_sp xeon_sp/skx: Reorder pci_devs.h 2020-09-16 10:18:59 +00:00
Kconfig